Lines Matching refs:r5
46 addi r5,r5,-(16 * n); \
49 addi r5,r5,-(16 * n); \
78 mr r5,r4
81 cmplwi 0,r5,4
86 add r5,r0,r5
89 add r8,r7,r5
117 clrlwi r5,r8,32-LG_CACHELINE_BYTES
118 addi r5,r5,4
119 2: srwi r0,r5,2
124 6: andi. r5,r5,3
125 7: cmpwi 0,r5,0
127 mtctr r5
137 cmplwi 0,r5,4
142 add r5,r0,r5
144 srwi r0,r5,2
149 6: andi. r5,r5,3
150 7: cmpwi 0,r5,0
152 mtctr r5
166 add r7,r3,r5 /* test if the src & dst overlap */
167 add r8,r4,r5
179 cmplw 0,r5,r0 /* is this more than total to do? */
182 subf r5,r0,r5
197 58: srwi. r0,r5,LG_CACHELINE_BYTES /* # complete cachelines */
198 clrlwi r5,r5,32-LG_CACHELINE_BYTES
222 63: srwi. r0,r5,2
229 64: andi. r0,r5,3
245 srwi. r7,r5,3
257 andi. r5,r5,7
258 2: cmplwi 0,r5,4
261 addi r5,r5,-4
263 3: cmpwi 0,r5,0
265 mtctr r5
279 subf r5,r0,r5
280 rlwinm. r7,r5,32-3,3,31
286 rlwinm. r7,r5,32-3,3,31 /* r0 = r5 >> 3 */
287 add r6,r3,r5
288 add r4,r4,r5
298 andi. r5,r5,7
299 2: cmplwi 0,r5,4
302 subi r5,r5,4
304 3: cmpwi 0,r5,0
306 mtctr r5
315 subf r5,r0,r5
316 rlwinm. r7,r5,32-3,3,31
328 cmplw 0,r5,r0 /* is this more than total to do? */
338 61: subf r5,r0,r5
354 58: srwi. r0,r5,LG_CACHELINE_BYTES /* # complete cachelines */
355 clrlwi r5,r5,32-LG_CACHELINE_BYTES
421 63: srwi. r0,r5,2
428 64: andi. r0,r5,3
444 90: subf r5,r8,r5
457 * 104f (if in read part) or 105f (if in write part), after updating r5
489 93: andi. r5,r5,3
497 94: li r5,0
501 * r5 + (ctr << r3), and r9 is 0 for read or 1 for write.
505 add. r3,r3,r5