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  • only in /netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/m68k/ifpsp060/src/

Lines Matching refs:d5

285 set EXC_D5,		EXC_DREGS+(5*4)		# offset of d5
1336 movm.l &0x3c00,-(%sp) # save d2-d5
1338 mov.l %d0,%d5 # put extword in d5
1452 movm.l &0x3c00,-(%sp) # save d2-d5
1454 mov.l %d0,%d5 # put extword in d5
1493 # d5 = extword (internal " " )
1495 btst &0x6,%d5 # is the index suppressed?
1500 bfextu %d5{&16:&4},%d2
1502 btst &0xb,%d5 # is index word or long?
1506 bfextu %d5{&21:&2},%d0
1509 btst &0x7,%d5 # is the bd suppressed?
1513 bfextu %d5{&26:&2},%d0 # get bd size
1540 bfextu %d5{&30:&2},%d0 # is od suppressed?
1570 btst &0x2,%d5 # pre or post indexing?
1600 movm.l (%sp)+,&0x003c # restore d2-d5
2108 mov.l (EXC_DREGS,%a6,%d0.w*4), %d5 # get dividend hi
2125 tst.l %d5 # chk sign of hi(dividend)
2131 negx.l %d5
2137 tst.l %d5 # is (hi(dividend) == 0)
2146 exg %d5,%d6 # q = 0, r = dividend
2150 tdivu.l %d7, %d5:%d6 # it's only a 32/32 bit div!
2157 cmp.l %d7,%d5
2171 neg.l %d5 # sgn(rem) = sgn(dividend)
2201 mov.l %d5, (EXC_DREGS,%a6,%d0.w*4) # save remainder
2225 # The most sig. longword of the 64 bit dividend must be in %d5, least #
2228 # The quotient is returned in %d6, remainder in %d5, unless the #
2249 swap %d5 # same as r*b if previous step rqd
2251 mov.w %d6, %d5 # rb + u3
2253 divu.w %d7, %d5
2255 mov.w %d5, %d1 # first quotient word
2257 mov.w %d6, %d5 # rb + u4
2259 divu.w %d7, %d5
2262 mov.w %d5, %d1 # 2nd quotient 'digit'
2263 clr.w %d5
2264 swap %d5 # now remainder
2286 roxl.l &0x1, %d5 # shift u1,u2
2293 mov.l %d5, %d2 # dividend mslw
2301 mov.l %d5, %d1
2319 mov.l %d5, %d4 # U1U2
2339 mov.l %d5, -(%sp) # save %d5 (%d6 already saved)
2342 mov.l %d7, %d5
2344 mov.l %d5, %d2 # now %d2,%d3 are trial*divisor
2346 mov.l (%sp)+, %d5 # restore dividend
2349 subx.l %d2, %d5 # subtract double precision
2360 addx.l %d2, %d5
2364 add.l %d3, %d5
2372 swap %d5
2374 mov.w %d6, %d5
2382 mov.w %d5, %d6
2384 swap %d5
2389 lsr.l &0x1, %d5 # shift into %d6
2393 mov.l %d6, %d5 # remainder
2398 # factors for the 32X32->64 multiplication are in %d5 and %d6.
2399 # returns 64 bit result in %d5 (hi) %d6(lo).
2405 mov.l %d5, %d4
2408 mulu.w %d5, %d6 # %d6 <- lsw*lsw
2409 mulu.w %d3, %d5 # %d5 <- msw-dest*lsw-source
2415 add.w %d5, %d6 # add msw of l*l to lsw of m*l product
2420 clr.w %d5
2422 swap %d5 # now use msws of longwords
2424 add.l %d2, %d5
2425 add.l %d3, %d5 # %d5 now ms 32 bits of final product
2582 mov.l %d3, %d5 # mr in %d5
2591 mulu.w %d7, %d5 # [3] lo(mr) * hi(md)
2601 add.w %d5, %d3 # hi([1]) + lo([3])
2608 clr.w %d5 # clear hi([3])
2610 swap %d5 # hi([3]) in lo %d5
2611 add.l %d5, %d4 # [4] + hi([2])
2777 mov.l (EXC_DREGS,%a6,%d1.w*4),%d5 # fetch Update2 Op
3356 movs.l %d5,(%a1) # Update2[31:0] -> DEST2
3447 movs.l %d5,(%a1) # Update2[31:0] -> Dest2
3507 movs.l %d5,(%a1) # Update2[31:0] -> DEST2
3656 movs.w %d5,(%a1) # Update2[15:0] -> DEST2
3747 movs.w %d5,(%a1) # Update2[15:0] -> DEST2
4189 mov.l %d2,%d5 # d5 = Update[7:0]
4255 movs.b %d5,(%a0) # Update[7:0] -> DEST+0x3