Lines Matching refs:INF
428 set INF, 0x02 # operand type for STAG/DTAG
1262 # source data type was an INF, NAN, DENORM, or UNNORM
2529 # The packed operand is an INF or a NAN if the exponent field is all ones.
2531 cmpi.w %d0,&0x7fff # INF or NAN?
2532 beq.b iea_op_setsrc # operand is an INF or NAN
10125 # - Store properly signed INF into fp0. #
10137 fmov.s &0x7f800000,%fp0 # return +INF in fp0
10143 fmov.s &0xff800000,%fp0 # return -INF in fp0
10524 fmov.s &0x7f800000,%fp0 # load +INF
10525 mov.b &inf_bmask,FPSR_CC(%a6) # set 'INF' ccode bit
10533 fmov.s &0xff800000,%fp0 # load -INF
10549 # +INF for a positive src operand. #
10558 # sopr_inf(): Return +INF for a positive src operand or #
10657 # ssincosi(): When the src operand is INF, store a QNAN in the cosine
10749 cmpi.b %d1,&INF
10763 cmpi.b %d1,&INF
10777 cmpi.b %d1,&INF
10830 cmpi.b %d1,&INF
10844 cmpi.b %d1,&INF
10858 cmpi.b %d1,&INF
10875 cmpi.b %d1,&INF
10889 cmpi.b %d1,&INF
11002 cmpi.b %d1,&INF
11016 cmpi.b %d1,&INF
11030 cmpi.b %d1,&INF
11044 cmpi.b %d1,&INF
11058 cmpi.b %d1,&INF
11072 cmpi.b %d1,&INF
11086 cmpi.b %d1,&INF
11100 cmpi.b %d1,&INF
11114 cmpi.b %d1,&INF
11128 cmpi.b %d1,&INF
11142 cmpi.b %d1,&INF
11156 cmpi.b %d1,&INF
11170 cmpi.b %d1,&INF
11184 cmpi.b %d1,&INF
11198 cmpi.b %d1,&INF
11212 cmpi.b %d1,&INF
11226 cmpi.b %d1,&INF
11240 cmpi.b %d1,&INF
11254 cmpi.b %d1,&INF
11268 cmpi.b %d1,&INF
11282 cmpi.b %d1,&INF
11296 cmpi.b %d1,&INF
11310 cmpi.b %d1,&INF
11324 cmpi.b %d1,&INF
11689 or.b %d0,FPSR_CC(%a6) # set INF,N if applicable
11906 short fmul_inf_src - tbl_fmul_op # NORM x INF
11915 short fmul_res_operr - tbl_fmul_op # ZERO x INF
11922 short fmul_inf_dst - tbl_fmul_op # INF x NORM
11923 short fmul_res_operr - tbl_fmul_op # INF x ZERO
11924 short fmul_inf_dst - tbl_fmul_op # INF x INF
11925 short fmul_res_qnan - tbl_fmul_op # INF x QNAN
11926 short fmul_inf_dst - tbl_fmul_op # INF x DENORM
11927 short fmul_res_snan - tbl_fmul_op # INF x SNAN
11933 short fmul_res_qnan - tbl_fmul_op # QNAN x INF
11942 short fmul_inf_src - tbl_fmul_op # NORM x INF
11951 short fmul_res_snan - tbl_fmul_op # SNAN x INF
11988 # INF w/ the j-bit set if the input INF j-bit was set. Destination
11993 fmovm.x DST(%a1),&0x80 # return INF result in fp0
11997 bpl.b fmul_inf_dst_p # result INF is pos.
12001 mov.b &inf_bmask+neg_bmask,FPSR_CC(%a6) # set INF/N
12005 mov.b &inf_bmask,FPSR_CC(%a6) # set INF
12010 fmovm.x SRC(%a0),&0x80 # return INF result in fp0
12014 bpl.b fmul_inf_dst_p # result INF is pos.
12269 or.b %d0,FPSR_CC(%a6) # set INF,N if applicable
12328 # do the fmove in; at this point, only possible ops are ZERO and INF.
12508 or.b %d0,FPSR_CC(%a6) # set INF if applicable
12674 short fdiv_zero_load - tbl_fdiv_op # NORM / INF
12683 short fdiv_zero_load - tbl_fdiv_op # ZERO / INF
12690 short fdiv_inf_dst - tbl_fdiv_op # INF / NORM
12691 short fdiv_inf_dst - tbl_fdiv_op # INF / ZERO
12692 short fdiv_res_operr - tbl_fdiv_op # INF / INF
12693 short fdiv_res_qnan - tbl_fdiv_op # INF / QNAN
12694 short fdiv_inf_dst - tbl_fdiv_op # INF / DENORM
12695 short fdiv_res_snan - tbl_fdiv_op # INF / SNAN
12701 short fdiv_res_qnan - tbl_fdiv_op # QNAN / INF
12710 short fdiv_zero_load - tbl_fdiv_op # DENORM / INF
12719 short fdiv_res_snan - tbl_fdiv_op # SNAN / INF
12749 # therefore, is an INF w/ the proper sign.
12750 # So, determine the sign and return a new INF (w/ the j-bit cleared).
12759 fmov.s &0xff800000,%fp0 # make result -INF
12760 mov.b &inf_bmask+neg_bmask,FPSR_CC(%a6) # set INF/N
12763 fmov.s &0x7f800000,%fp0 # make result +INF
12764 mov.b &inf_bmask,FPSR_CC(%a6) # set INF
12768 # The destination was an INF w/ an In Range or ZERO source, the result is
12769 # an INF w/ the proper sign.
12770 # The 68881/882 returns the destination INF w/ the new sign(if the j-bit of the
12771 # dst INF is set, then then j-bit of the result INF is also set).
12783 mov.b &inf_bmask+neg_bmask,FPSR_CC(%a6) # set INF/NEG
12788 fabs.x %fp0 # return positive INF
12789 mov.b &inf_bmask,FPSR_CC(%a6) # set INF
13049 or.b %d0,FPSR_CC(%a6) # set INF,N if applicable
13108 # do the fneg; at this point, only possible ops are ZERO and INF.
13159 cmpi.b %d1,&INF # weed out INF
13257 cmpi.b %d1,&INF # weed out INF
13300 tst.b SRC_EX(%a0) # is INF negative?
13359 cmpi.b %d1,&INF # weed out INF
13402 tst.b SRC_EX(%a0) # is INF negative?
13664 or.b %d0,FPSR_CC(%a6) # set INF,N if applicable
13724 cmpi.b %d1,&INF # weed out INF
13789 short fcmp_norm - tbl_fcmp_op # NORM - INF
13798 short fcmp_norm - tbl_fcmp_op # ZERO - INF
13805 short fcmp_norm - tbl_fcmp_op # INF - NORM
13806 short fcmp_norm - tbl_fcmp_op # INF - ZERO
13807 short fcmp_norm - tbl_fcmp_op # INF - INF
13808 short fcmp_res_qnan - tbl_fcmp_op # INF - QNAN
13809 short fcmp_dnrm_s - tbl_fcmp_op # INF - DENORM
13810 short fcmp_res_snan - tbl_fcmp_op # INF - SNAN
13816 short fcmp_res_qnan - tbl_fcmp_op # QNAN - INF
13825 short fcmp_dnrm_d - tbl_fcmp_op # DENORM - INF
13834 short fcmp_res_snan - tbl_fcmp_op # SNAN - INF
13856 # If you have a DENORM and an INF or ZERO, just force the DENORM's j-bit to a one
14048 or.b %d0,FPSR_CC(%a6) # set INF,N if applicable
14201 short fsglmul_inf_src - tbl_fsglmul_op # NORM x INF
14210 short fsglmul_res_operr - tbl_fsglmul_op # ZERO x INF
14217 short fsglmul_inf_dst - tbl_fsglmul_op # INF x NORM
14218 short fsglmul_res_operr - tbl_fsglmul_op # INF x ZERO
14219 short fsglmul_inf_dst - tbl_fsglmul_op # INF x INF
14220 short fsglmul_res_qnan - tbl_fsglmul_op # INF x QNAN
14221 short fsglmul_inf_dst - tbl_fsglmul_op # INF x DENORM
14222 short fsglmul_res_snan - tbl_fsglmul_op # INF x SNAN
14228 short fsglmul_res_qnan - tbl_fsglmul_op # QNAN x INF
14237 short fsglmul_inf_src - tbl_fsglmul_op # NORM x INF
14246 short fsglmul_res_snan - tbl_fsglmul_op # SNAN x INF
14401 or.b %d0,FPSR_CC(%a6) # set INF if applicable
14536 short fsgldiv_zero_load - tbl_fsgldiv_op # NORM / INF
14545 short fsgldiv_zero_load - tbl_fsgldiv_op # ZERO / INF
14552 short fsgldiv_inf_dst - tbl_fsgldiv_op # INF / NORM
14553 short fsgldiv_inf_dst - tbl_fsgldiv_op # INF / ZERO
14554 short fsgldiv_res_operr - tbl_fsgldiv_op # INF / INF
14555 short fsgldiv_res_qnan - tbl_fsgldiv_op # INF / QNAN
14556 short fsgldiv_inf_dst - tbl_fsgldiv_op # INF / DENORM
14557 short fsgldiv_res_snan - tbl_fsgldiv_op # INF / SNAN
14563 short fsgldiv_res_qnan - tbl_fsgldiv_op # QNAN / INF
14572 short fsgldiv_zero_load - tbl_fsgldiv_op # DENORM / INF
14581 short fsgldiv_res_snan - tbl_fsgldiv_op # SNAN / INF
14734 or.b %d0,FPSR_CC(%a6) # set INF,N if applicable
14900 short fadd_inf_src - tbl_fadd_op # NORM + INF
14909 short fadd_inf_src - tbl_fadd_op # ZERO + INF
14916 short fadd_inf_dst - tbl_fadd_op # INF + NORM
14917 short fadd_inf_dst - tbl_fadd_op # INF + ZERO
14918 short fadd_inf_2 - tbl_fadd_op # INF + INF
14920 short fadd_inf_dst - tbl_fadd_op # INF + DENORM
14927 short fadd_res_qnan - tbl_fadd_op # QNAN + INF
14936 short fadd_inf_src - tbl_fadd_op # DENORM + INF
14945 short fadd_res_snan - tbl_fadd_op # SNAN + INF
15019 # different signs. else, an INF of the same sign is returned
15025 bmi.l res_operr # weed out (-INF)+(+INF)
15028 # src INF since that's where the 881/882 gets the j-bit from...
15031 # operands are INF and one of {ZERO, INF, DENORM, NORM}
15034 fmovm.x SRC(%a0),&0x80 # return src INF
15035 tst.b SRC_EX(%a0) # is INF positive?
15037 mov.b &neg_bmask+inf_bmask,FPSR_CC(%a6) # set INF/NEG
15041 # operands are INF and one of {ZERO, INF, DENORM, NORM}
15044 fmovm.x DST(%a1),&0x80 # return dst INF
15045 tst.b DST_EX(%a1) # is INF positive?
15047 mov.b &neg_bmask+inf_bmask,FPSR_CC(%a6) # set INF/NEG
15051 mov.b &inf_bmask,FPSR_CC(%a6) # set INF
15187 or.b %d0,FPSR_CC(%a6) # set INF,N if applicable
15353 short fsub_inf_src - tbl_fsub_op # NORM - INF
15362 short fsub_inf_src - tbl_fsub_op # ZERO - INF
15369 short fsub_inf_dst - tbl_fsub_op # INF - NORM
15370 short fsub_inf_dst - tbl_fsub_op # INF - ZERO
15371 short fsub_inf_2 - tbl_fsub_op # INF - INF
15373 short fsub_inf_dst - tbl_fsub_op # INF - DENORM
15380 short fsub_res_qnan - tbl_fsub_op # QNAN - INF
15389 short fsub_inf_src - tbl_fsub_op # DENORM - INF
15398 short fsub_res_snan - tbl_fsub_op # SNAN - INF
15477 bpl.l res_operr # weed out (-INF)+(+INF)
15480 # the src INF since that's where the 881/882 gets the j-bit.
15483 fmovm.x SRC(%a0),&0x80 # return src INF
15486 mov.b &neg_bmask+inf_bmask,FPSR_CC(%a6) # set INF/NEG
15490 fmovm.x DST(%a1),&0x80 # return dst INF
15491 tst.b DST_EX(%a1) # is INF negative?
15493 mov.b &neg_bmask+inf_bmask,FPSR_CC(%a6) # set INF/NEG
15497 mov.b &inf_bmask,FPSR_CC(%a6) # set INF
15746 or.b %d0,FPSR_CC(%a6) # set INF,N if applicable
15804 cmpi.b %d1,&INF # weed out INF
15813 # fsqrt(+INF) = +INF
15814 # fsqrt(-INF) = OPERR
15829 tst.b SRC_EX(%a0) # is INF positive or negative?
15832 fmovm.x SRC(%a0),&0x80 # return +INF in fp0
19760 # SGL: can be either NORM, DENORM, ZERO, INF, QNAN or SNAN but not UNNORM
22475 # one of: NORM, INF, QNAN, SNAN, DENORM, UNNORM, ZERO #
22532 mov.b &INF, %d0
22555 # one of: NORM, INF, QNAN, SNAN, DENORM, ZERO #
22594 mov.b &INF, %d0
22618 # one of: NORM, INF, QNAN, SNAN, DENORM, ZERO #
22653 mov.b &INF, %d0
22892 long 0x7fff0000,0x00000000,0x00000000,0x00000000 # +INF; RN
22895 long 0x7fff0000,0x00000000,0x00000000,0x00000000 # +INF; RP
22897 long 0x7fff0000,0x00000000,0x00000000,0x00000000 # +INF; RN
22900 long 0x7fff0000,0x00000000,0x00000000,0x00000000 # +INF; RP
22902 long 0x7fff0000,0x00000000,0x00000000,0x00000000 # +INF; RN
22905 long 0x7fff0000,0x00000000,0x00000000,0x00000000 # +INF; RP
22912 long 0xffff0000,0x00000000,0x00000000,0x00000000 # -INF; RN
22914 long 0xffff0000,0x00000000,0x00000000,0x00000000 # -INF; RM
22917 long 0xffff0000,0x00000000,0x00000000,0x00000000 # -INF; RN
22919 long 0xffff0000,0x00000000,0x00000000,0x00000000 # -INF; RM
22922 long 0xffff0000,0x00000000,0x00000000,0x00000000 # -INF; RN
22924 long 0xffff0000,0x00000000,0x00000000,0x00000000 # -INF; RM
22950 # If the packed operand is a ZERO,NAN, or INF, convert it to #
22970 # The packed operand is an INF or a NAN if the exponent field is all ones.
22972 cmpi.w %d0,&0x7fff # INF or NAN?
22974 rts # operand is an INF or NAN