Lines Matching defs:ovfl_val
412 unsigned long ovfl_val; /* overflow value for counters */
775 return ctx->ctx_pmds[i].val + (ia64_get_pmd(i) & pmu_conf->ovfl_val);
784 unsigned long ovfl_val = pmu_conf->ovfl_val;
786 ctx->ctx_pmds[i].val = val & ~ovfl_val;
791 ia64_set_pmd(i, val & ovfl_val);
916 ovfl_mask = pmu_conf->ovfl_val;
990 ovfl_mask = pmu_conf->ovfl_val;
1091 unsigned long val, ovfl_val = pmu_conf->ovfl_val;
1095 val = PMD_IS_COUNTING(i) ? pmds[i] & ovfl_val : pmds[i];
1107 unsigned long ovfl_val = pmu_conf->ovfl_val;
1125 ctx->ctx_pmds[i].val = val & ~ovfl_val;
1126 val &= ovfl_val;
1149 /* masking 0 with ovfl_val yields 0 */
3095 ovfl_mask = pmu_conf->ovfl_val;
3295 ovfl_mask = pmu_conf->ovfl_val;
5174 unsigned long old_val, ovfl_val, new_val;
5190 ovfl_val = pmu_conf->ovfl_val;
5218 new_val += 1 + ovfl_val;
5233 ia64_get_pmd(i) & ovfl_val,
5607 pmu_conf->ovfl_val,
6265 unsigned long mask2, val, pmd_val, ovfl_val;
6314 ovfl_val = pmu_conf->ovfl_val;
6317 DPRINT(("is_self=%d ovfl_val=0x%lx mask2=0x%lx\n", is_self, ovfl_val, mask2));
6334 val & ovfl_val));
6339 val = ctx->ctx_pmds[i].val + (val & ovfl_val);
6352 val += 1 + ovfl_val;
6600 ffz(pmu_conf->ovfl_val));