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  • only in /netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/frv/mm/

Lines Matching refs:gr31

55 	movsg		pcsr,gr31
57 subcc gr31,gr30,gr0,icc0
75 movgs gr31,psr
100 movsg pcsr,gr31
101 subcc gr31,gr30,gr0,icc0
114 movgs gr31,psr
142 srlicc.p gr31,#26,gr0,icc0
144 srli.p gr29,#12,gr31 /* use EAR0[25:14] as PTE index */
154 and gr31,gr30,gr31
156 add gr30,gr31,gr31
157 ldi @(gr31,#0),gr30 /* fetch the PTE */
161 sti.p gr30,@(gr31,#0) /* update the PTE */
168 movsg iampr1,gr31
169 andicc gr31,#xAMPRx_V,gr0,icc0
170 setlos.p 0xfffff000,gr31
173 movsg iamlr1,gr31
174 movgs gr31,tplr /* set TPLR.CXN */
175 tlbpr gr31,gr0,#4,#0 /* delete matches from TLB, IAMR1, DAMR1 */
177 movsg dampr1,gr31
178 ori gr31,#xAMPRx_V,gr31 /* entry was invalidated by tlbpr #4 */
179 movgs gr31,tppr
180 movsg iamlr1,gr31 /* set TPLR.CXN */
181 movgs gr31,tplr
182 tlbpr gr31,gr0,#2,#0 /* save to the TLB */
183 movsg tpxr,gr31 /* check the TLB write error flag */
184 andicc.p gr31,#TPXR_E,gr0,icc0
185 setlos #0xfffff000,gr31
191 and gr29,gr31,gr29
192 movsg cxnr,gr31
193 or gr29,gr31,gr29
214 srli gr29,#26,gr31 /* calculate PGE offset */
215 slli gr31,#8,gr31 /* and clear bottom bits */
218 ld @(gr31,gr30),gr30 /* access the PGE */
226 slli.p gr31,#18,gr31
229 movgs gr31,scr0
233 srli.p gr29,#12,gr31 /* use EAR0[25:14] as PTE index */
263 srlicc.p gr31,#26,gr0,icc0
265 srli.p gr29,#12,gr31 /* use EAR0[25:14] as PTE index */
275 and gr31,gr30,gr31
277 add gr30,gr31,gr31
278 ldi @(gr31,#0),gr30 /* fetch the PTE */
282 sti.p gr30,@(gr31,#0) /* update the PTE */
288 movsg dampr1,gr31
289 andicc gr31,#xAMPRx_V,gr0,icc0
290 setlos.p 0xfffff000,gr31
293 movsg damlr1,gr31
294 movgs gr31,tplr /* set TPLR.CXN */
295 tlbpr gr31,gr0,#4,#0 /* delete matches from TLB, IAMR1, DAMR1 */
297 movsg dampr1,gr31
298 ori gr31,#xAMPRx_V,gr31 /* entry was invalidated by tlbpr #4 */
299 movgs gr31,tppr
300 movsg damlr1,gr31 /* set TPLR.CXN */
301 movgs gr31,tplr
302 tlbpr gr31,gr0,#2,#0 /* save to the TLB */
303 movsg tpxr,gr31 /* check the TLB write error flag */
304 andicc.p gr31,#TPXR_E,gr0,icc0
305 setlos #0xfffff000,gr31
311 and gr29,gr31,gr29
312 movsg cxnr,gr31
313 or gr29,gr31,gr29
334 srli gr29,#26,gr31 /* calculate PGE offset */
335 slli gr31,#8,gr31 /* and clear bottom bits */
338 ld @(gr31,gr30),gr30 /* access the PGE */
346 slli.p gr31,#18,gr31
349 movgs gr31,scr1
353 srli.p gr29,#12,gr31 /* use EAR0[25:14] as PTE index */
381 srlicc.p gr31,#26,gr0,icc0
383 srli.p gr28,#12,gr31 /* use EAR0[25:14] as PTE index */
393 and gr31,gr30,gr31
395 add gr30,gr31,gr31
396 ldi @(gr31,#0),gr30 /* fetch the PTE */
400 sti.p gr30,@(gr31,#0) /* update the PTE */
405 movsg dampr1,gr31
406 andicc gr31,#xAMPRx_V,gr0,icc0
407 setlos.p 0xfffff000,gr31
410 movsg dampr1,gr31
411 movgs gr31,tppr
412 movsg damlr1,gr31 /* set TPLR.CXN */
413 movgs gr31,tplr
414 tlbpr gr31,gr0,#2,#0 /* save to the TLB */
415 movsg tpxr,gr31 /* check the TLB write error flag */
416 andicc.p gr31,#TPXR_E,gr0,icc0
417 setlos #0xfffff000,gr31
423 and gr28,gr31,gr28
424 movsg cxnr,gr31
425 or gr28,gr31,gr28
443 srli gr28,#26,gr31 /* calculate PGE offset */
444 slli gr31,#8,gr31 /* and clear bottom bits */
447 ld @(gr31,gr30),gr30 /* access the PGE */
455 slli.p gr31,#18,gr31
458 movgs gr31,scr0
462 srli.p gr28,#12,gr31 /* use EAR0[25:14] as PTE index */
490 srlicc.p gr31,#26,gr0,icc0
492 srli.p gr28,#12,gr31 /* use EAR0[25:14] as PTE index */
502 and gr31,gr30,gr31
506 add gr30,gr31,gr31
507 ldi @(gr31,#0),gr30 /* fetch the PTE */
511 sti.p gr30,@(gr31,#0) /* update the PTE */
516 movsg dampr1,gr31
517 andicc gr31,#xAMPRx_V,gr0,icc0
518 setlos.p 0xfffff000,gr31
521 movsg dampr1,gr31
522 movgs gr31,tppr
523 movsg damlr1,gr31 /* set TPLR.CXN */
524 movgs gr31,tplr
525 tlbpr gr31,gr0,#2,#0 /* save to the TLB */
526 movsg tpxr,gr31 /* check the TLB write error flag */
527 andicc.p gr31,#TPXR_E,gr0,icc0
528 setlos #0xfffff000,gr31
534 and gr28,gr31,gr28
535 movsg cxnr,gr31
536 or gr28,gr31,gr28
555 movsg scr0,gr31 /* consult the insn-PGE-cache key */
556 xor gr28,gr31,gr31
557 srlicc gr31,#26,gr0,icc0
558 srli gr28,#12,gr31 /* use EAR0[25:14] as PTE index */
563 and gr31,gr30,gr31
568 srli gr28,#26,gr31 /* calculate PGE offset */
569 slli gr31,#8,gr31 /* and clear bottom bits */
572 ld @(gr31,gr30),gr30 /* access the PGE */
580 slli.p gr31,#18,gr31
583 movgs gr31,scr1
587 srli.p gr28,#12,gr31 /* use EAR0[25:14] as PTE index */