Lines Matching refs:mgr
49 static int retrieve_msg_frame(struct mixart_mgr *mgr, u32 *msg_frame)
54 tailptr = readl_be(MIXART_MEM(mgr, MSG_OUTBOUND_POST_TAIL));
55 headptr = readl_be(MIXART_MEM(mgr, MSG_OUTBOUND_POST_HEAD));
63 *msg_frame = readl_be(MIXART_MEM(mgr, tailptr));
69 writel_be(tailptr, MIXART_MEM(mgr, MSG_OUTBOUND_POST_TAIL));
74 static int get_msg(struct mixart_mgr *mgr, struct mixart_msg *resp,
85 spin_lock_irqsave(&mgr->msg_lock, flags);
89 size = readl_be(MIXART_MEM(mgr, msg_frame_address)); /* size of descriptor + response */
90 resp->message_id = readl_be(MIXART_MEM(mgr, msg_frame_address + 4)); /* dwMessageID */
91 resp->uid.object_id = readl_be(MIXART_MEM(mgr, msg_frame_address + 8)); /* uidDest */
92 resp->uid.desc = readl_be(MIXART_MEM(mgr, msg_frame_address + 12)); /* */
101 memcpy_fromio(resp->data, MIXART_MEM(mgr, msg_frame_address + MSG_HEADER_SIZE ), size);
115 headptr = readl_be(MIXART_MEM(mgr, MSG_OUTBOUND_FREE_HEAD));
123 writel_be(msg_frame_address, MIXART_MEM(mgr, headptr));
130 writel_be(headptr, MIXART_MEM(mgr, MSG_OUTBOUND_FREE_HEAD));
133 spin_unlock_irqrestore(&mgr->msg_lock, flags);
142 /* call with mgr->msg_lock held! */
143 static int send_msg( struct mixart_mgr *mgr,
158 tailptr = readl_be(MIXART_MEM(mgr, MSG_INBOUND_FREE_TAIL));
159 headptr = readl_be(MIXART_MEM(mgr, MSG_INBOUND_FREE_HEAD));
170 msg_frame_address = readl_be(MIXART_MEM(mgr, tailptr));
171 writel(0, MIXART_MEM(mgr, tailptr)); /* set address to zero on this fifo position */
178 writel_be(tailptr, MIXART_MEM(mgr, MSG_INBOUND_FREE_TAIL));
183 writel_be( msg->size + MSG_DESCRIPTOR_SIZE, MIXART_MEM(mgr, msg_frame_address) ); /* size of descriptor + request */
184 writel_be( msg->message_id , MIXART_MEM(mgr, msg_frame_address + 4) ); /* dwMessageID */
185 writel_be( msg->uid.object_id, MIXART_MEM(mgr, msg_frame_address + 8) ); /* uidDest */
186 writel_be( msg->uid.desc, MIXART_MEM(mgr, msg_frame_address + 12) ); /* */
187 writel_be( MSG_DESCRIPTOR_SIZE, MIXART_MEM(mgr, msg_frame_address + 16) ); /* SizeHeader */
188 writel_be( MSG_DESCRIPTOR_SIZE, MIXART_MEM(mgr, msg_frame_address + 20) ); /* OffsetDLL_T16 */
189 writel_be( msg->size, MIXART_MEM(mgr, msg_frame_address + 24) ); /* SizeDLL_T16 */
190 writel_be( MSG_DESCRIPTOR_SIZE, MIXART_MEM(mgr, msg_frame_address + 28) ); /* OffsetDLL_DRV */
191 writel_be( 0, MIXART_MEM(mgr, msg_frame_address + 32) ); /* SizeDLL_DRV */
192 writel_be( MSG_DESCRIPTOR_SIZE + max_answersize, MIXART_MEM(mgr, msg_frame_address + 36) ); /* dwExpectedAnswerSize */
196 writel_be( *(u32*)(msg->data + i), MIXART_MEM(mgr, MSG_HEADER_SIZE + msg_frame_address + i) );
202 mgr->pending_event = *msg_event;
206 mgr->pending_event = msg_frame_address;
217 headptr = readl_be(MIXART_MEM(mgr, MSG_INBOUND_POST_HEAD));
223 writel_be(msg_frame_address, MIXART_MEM(mgr, headptr));
230 writel_be(headptr, MIXART_MEM(mgr, MSG_INBOUND_POST_HEAD));
236 int snd_mixart_send_msg(struct mixart_mgr *mgr, struct mixart_msg *request, int max_resp_size, void *resp_data)
244 mutex_lock(&mgr->msg_mutex);
248 spin_lock_irq(&mgr->msg_lock);
250 err = send_msg(mgr, request, max_resp_size, 1, &msg_frame); /* send and mark the answer pending */
252 spin_unlock_irq(&mgr->msg_lock);
253 mutex_unlock(&mgr->msg_mutex);
258 add_wait_queue(&mgr->msg_sleep, &wait);
259 spin_unlock_irq(&mgr->msg_lock);
261 remove_wait_queue(&mgr->msg_sleep, &wait);
265 mutex_unlock(&mgr->msg_mutex);
276 err = get_msg(mgr, &resp, msg_frame);
281 mutex_unlock(&mgr->msg_mutex);
286 int snd_mixart_send_msg_wait_notif(struct mixart_mgr *mgr,
297 mutex_lock(&mgr->msg_mutex);
301 spin_lock_irq(&mgr->msg_lock);
303 err = send_msg(mgr, request, MSG_DEFAULT_SIZE, 1, ¬if_event); /* send and mark the notification event pending */
305 spin_unlock_irq(&mgr->msg_lock);
306 mutex_unlock(&mgr->msg_mutex);
311 add_wait_queue(&mgr->msg_sleep, &wait);
312 spin_unlock_irq(&mgr->msg_lock);
314 remove_wait_queue(&mgr->msg_sleep, &wait);
318 mutex_unlock(&mgr->msg_mutex);
323 mutex_unlock(&mgr->msg_mutex);
328 int snd_mixart_send_msg_nonblock(struct mixart_mgr *mgr, struct mixart_msg *request)
335 spin_lock_irqsave(&mgr->msg_lock, flags);
336 err = send_msg(mgr, request, MSG_DEFAULT_SIZE, 0, &message_frame);
337 spin_unlock_irqrestore(&mgr->msg_lock, flags);
340 atomic_inc(&mgr->msg_processed);
352 struct mixart_mgr *mgr = ( struct mixart_mgr*)(arg);
357 spin_lock(&mgr->lock);
359 while (mgr->msg_fifo_readptr != mgr->msg_fifo_writeptr) {
360 msg = mgr->msg_fifo[mgr->msg_fifo_readptr];
361 mgr->msg_fifo_readptr++;
362 mgr->msg_fifo_readptr %= MSG_FIFO_SIZE;
374 err = get_msg(mgr, &resp, addr);
403 atomic_dec(&mgr->msg_processed);
407 spin_unlock(&mgr->lock);
413 struct mixart_mgr *mgr = dev_id;
420 spin_lock(&mgr->lock);
422 it_reg = readl_le(MIXART_REG(mgr, MIXART_PCI_OMISR_OFFSET));
425 spin_unlock(&mgr->lock);
430 writel_le(MIXART_HOST_ALL_INTERRUPT_MASKED, MIXART_REG(mgr, MIXART_PCI_OMIMR_OFFSET));
433 it_reg = readl(MIXART_REG(mgr, MIXART_PCI_ODBR_OFFSET));
434 writel(it_reg, MIXART_REG(mgr, MIXART_PCI_ODBR_OFFSET));
437 writel_le( MIXART_OIDI, MIXART_REG(mgr, MIXART_PCI_OMISR_OFFSET) );
440 while (retrieve_msg_frame(mgr, &msg)) {
447 err = get_msg(mgr, &resp, msg & ~MSG_TYPE_MASK);
466 struct snd_mixart *chip = mgr->chip[chip_number];
469 if ((chip_number >= mgr->num_cards) || (pcm_number >= MIXART_PCM_TOTAL) || (sub_number >= MIXART_PLAYBACK_STREAMS)) {
504 spin_unlock(&mgr->lock);
506 spin_lock(&mgr->lock);
538 spin_lock(&mgr->msg_lock);
539 if( (msg & ~MSG_TYPE_MASK) == mgr->pending_event ) {
540 wake_up(&mgr->msg_sleep);
541 mgr->pending_event = 0;
545 mgr->msg_fifo[mgr->msg_fifo_writeptr] = msg;
546 mgr->msg_fifo_writeptr++;
547 mgr->msg_fifo_writeptr %= MSG_FIFO_SIZE;
548 tasklet_hi_schedule(&mgr->msg_taskq);
550 spin_unlock(&mgr->msg_lock);
561 writel_le( MIXART_ALLOW_OUTBOUND_DOORBELL, MIXART_REG( mgr, MIXART_PCI_OMIMR_OFFSET));
563 spin_unlock(&mgr->lock);
569 void snd_mixart_init_mailbox(struct mixart_mgr *mgr)
571 writel( 0, MIXART_MEM( mgr, MSG_HOST_RSC_PROTECTION ) );
572 writel( 0, MIXART_MEM( mgr, MSG_AGENT_RSC_PROTECTION ) );
575 if(mgr->irq >= 0) {
576 writel_le( MIXART_ALLOW_OUTBOUND_DOORBELL, MIXART_REG( mgr, MIXART_PCI_OMIMR_OFFSET));
581 void snd_mixart_exit_mailbox(struct mixart_mgr *mgr)
584 writel_le( MIXART_HOST_ALL_INTERRUPT_MASKED, MIXART_REG( mgr, MIXART_PCI_OMIMR_OFFSET));
588 void snd_mixart_reset_board(struct mixart_mgr *mgr)
591 writel_be( 1, MIXART_REG(mgr, MIXART_BA1_BRUTAL_RESET_OFFSET) );