Lines Matching refs:master
53 #define WM_DAC_MASTER_ATTEN 0x08 /* DAC master analog attenuation */
55 #define WM_DAC_DIG_MASTER_ATTEN 0x11 /* DAC master digital attenuation */
61 #define WM_MASTER 0x17 /* master clock and mode */
257 static void wm_set_vol(struct snd_ice1712 *ice, unsigned int index, unsigned short vol, unsigned short master)
261 if ((master & WM_VOL_MUTE) || (vol & WM_VOL_MUTE))
264 nvol = 127 - wm_vol[(((vol & ~WM_VOL_MUTE) * (master & ~WM_VOL_MUTE)) / 127) & WM_VOL_MAX];
318 ucontrol->value.integer.value[i] = ice->spec.phase28.master[i] & ~WM_VOL_MUTE;
329 if (ucontrol->value.integer.value[ch] != ice->spec.phase28.master[ch]) {
331 ice->spec.phase28.master[ch] &= WM_VOL_MUTE;
332 ice->spec.phase28.master[ch] |= ucontrol->value.integer.value[ch];
336 ice->spec.phase28.master[ch]);
364 0x08, 0x100, /* master analog mute */
373 0x11, 0x1ff, /* master digital full */
420 ice->spec.phase28.master[0] = WM_VOL_MUTE;
421 ice->spec.phase28.master[1] = WM_VOL_MUTE;
424 wm_set_vol(ice, i, ice->spec.phase28.vol[i], ice->spec.phase28.master[i % 2]);
470 ice->spec.phase28.master[i]);
518 ice->spec.phase28.master[i]);
528 * WM8770 master mute control
542 ucontrol->value.integer.value[0] = (ice->spec.phase28.master[0] & WM_VOL_MUTE) ? 0 : 1;
543 ucontrol->value.integer.value[1] = (ice->spec.phase28.master[1] & WM_VOL_MUTE) ? 0 : 1;
554 int val = (ice->spec.phase28.master[i] & WM_VOL_MUTE) ? 0 : 1;
557 ice->spec.phase28.master[i] &= ~WM_VOL_MUTE;
558 ice->spec.phase28.master[i] |=
563 ice->spec.phase28.master[i]);
572 /* digital master volume */