Lines Matching refs:rirb
331 struct azx_rb rirb;
445 chip->rirb.addr = chip->rb.addr + 2048;
446 chip->rirb.buf = (u32 *)(chip->rb.area + 2048);
447 azx_writel(chip, RIRBLBASE, (u32)chip->rirb.addr);
448 azx_writel(chip, RIRBUBASE, upper_32bit(chip->rirb.addr));
450 /* set the rirb size to 256 entries (ULI requires explicitly) */
452 /* reset the rirb hw write pointer */
456 /* enable rirb dma and response irq */
458 chip->rirb.rp = chip->rirb.cmds = 0;
488 chip->rirb.cmds++;
505 if (wp == chip->rirb.wp)
507 chip->rirb.wp = wp;
509 while (chip->rirb.rp != wp) {
510 chip->rirb.rp++;
511 chip->rirb.rp %= ICH6_MAX_RIRB_ENTRIES;
513 rp = chip->rirb.rp << 1; /* an RIRB entry is 8-bytes */
514 res_ex = le32_to_cpu(chip->rirb.buf[rp + 1]);
515 res = le32_to_cpu(chip->rirb.buf[rp]);
518 else if (chip->rirb.cmds) {
519 chip->rirb.cmds--;
520 chip->rirb.res = res;
539 if (! chip->rirb.cmds)
540 return chip->rirb.res; /* the last value */
565 chip->rirb.rp = azx_readb(chip, RIRBWP);
566 chip->rirb.cmds = 0;
751 /* clear rirb status */
860 /* clear rirb int */