Lines Matching defs:snd_opl4_write
37 void snd_opl4_write(struct snd_opl4 *opl4, u8 reg, u8 value)
46 EXPORT_SYMBOL(snd_opl4_write);
67 snd_opl4_write(opl4, OPL4_REG_MEMORY_CONFIGURATION, memcfg | OPL4_MODE_BIT);
69 snd_opl4_write(opl4, OPL4_REG_MEMORY_ADDRESS_HIGH, offset >> 16);
70 snd_opl4_write(opl4, OPL4_REG_MEMORY_ADDRESS_MID, offset >> 8);
71 snd_opl4_write(opl4, OPL4_REG_MEMORY_ADDRESS_LOW, offset);
78 snd_opl4_write(opl4, OPL4_REG_MEMORY_CONFIGURATION, memcfg);
93 snd_opl4_write(opl4, OPL4_REG_MEMORY_CONFIGURATION, memcfg | OPL4_MODE_BIT);
95 snd_opl4_write(opl4, OPL4_REG_MEMORY_ADDRESS_HIGH, offset >> 16);
96 snd_opl4_write(opl4, OPL4_REG_MEMORY_ADDRESS_MID, offset >> 8);
97 snd_opl4_write(opl4, OPL4_REG_MEMORY_ADDRESS_LOW, offset);
104 snd_opl4_write(opl4, OPL4_REG_MEMORY_CONFIGURATION, memcfg);
140 snd_opl4_write(opl4, OPL4_REG_MIX_CONTROL_FM, 0x00);
141 snd_opl4_write(opl4, OPL4_REG_MIX_CONTROL_PCM, 0xff);
148 snd_opl4_write(opl4, OPL4_REG_MIX_CONTROL_FM, 0x3f);
149 snd_opl4_write(opl4, OPL4_REG_MIX_CONTROL_PCM, 0x3f);
150 snd_opl4_write(opl4, OPL4_REG_MEMORY_CONFIGURATION, 0x00);