Lines Matching refs:bfin_write32
52 #define bfin_write_TIMER8_COUNTER(val) bfin_write32(TIMER8_COUNTER, val)
54 #define bfin_write_TIMER8_PERIOD(val) bfin_write32(TIMER8_PERIOD, val)
56 #define bfin_write_TIMER8_WIDTH(val) bfin_write32(TIMER8_WIDTH, val)
60 #define bfin_write_TIMER9_COUNTER(val) bfin_write32(TIMER9_COUNTER, val)
62 #define bfin_write_TIMER9_PERIOD(val) bfin_write32(TIMER9_PERIOD, val)
64 #define bfin_write_TIMER9_WIDTH(val) bfin_write32(TIMER9_WIDTH, val)
68 #define bfin_write_TIMER10_COUNTER(val) bfin_write32(TIMER10_COUNTER, val)
70 #define bfin_write_TIMER10_PERIOD(val) bfin_write32(TIMER10_PERIOD, val)
72 #define bfin_write_TIMER10_WIDTH(val) bfin_write32(TIMER10_WIDTH, val)
81 #define bfin_write_TIMER_STATUS1(val) bfin_write32(TIMER_STATUS1, val)
94 #define bfin_write_SPORT0_TX(val) bfin_write32(SPORT0_TX, val)
96 #define bfin_write_SPORT0_RX(val) bfin_write32(SPORT0_RX, val)
114 #define bfin_write_SPORT0_MTCS0(val) bfin_write32(SPORT0_MTCS0, val)
116 #define bfin_write_SPORT0_MTCS1(val) bfin_write32(SPORT0_MTCS1, val)
118 #define bfin_write_SPORT0_MTCS2(val) bfin_write32(SPORT0_MTCS2, val)
120 #define bfin_write_SPORT0_MTCS3(val) bfin_write32(SPORT0_MTCS3, val)
122 #define bfin_write_SPORT0_MRCS0(val) bfin_write32(SPORT0_MRCS0, val)
124 #define bfin_write_SPORT0_MRCS1(val) bfin_write32(SPORT0_MRCS1, val)
126 #define bfin_write_SPORT0_MRCS2(val) bfin_write32(SPORT0_MRCS2, val)
128 #define bfin_write_SPORT0_MRCS3(val) bfin_write32(SPORT0_MRCS3, val)
149 #define bfin_write_EPPI0_CONTROL(val) bfin_write32(EPPI0_CONTROL, val)
151 #define bfin_write_EPPI0_FS1W_HBL(val) bfin_write32(EPPI0_FS1W_HBL, val)
153 #define bfin_write_EPPI0_FS1P_AVPL(val) bfin_write32(EPPI0_FS1P_AVPL, val)
155 #define bfin_write_EPPI0_FS2W_LVB(val) bfin_write32(EPPI0_FS2W_LVB, val)
157 #define bfin_write_EPPI0_FS2P_LAVF(val) bfin_write32(EPPI0_FS2P_LAVF, val)
159 #define bfin_write_EPPI0_CLIP(val) bfin_write32(EPPI0_CLIP, val)
243 #define bfin_write_MXVR_STATE_0(val) bfin_write32(MXVR_STATE_0, val)
245 #define bfin_write_MXVR_STATE_1(val) bfin_write32(MXVR_STATE_1, val)
247 #define bfin_write_MXVR_INT_STAT_0(val) bfin_write32(MXVR_INT_STAT_0, val)
249 #define bfin_write_MXVR_INT_STAT_1(val) bfin_write32(MXVR_INT_STAT_1, val)
251 #define bfin_write_MXVR_INT_EN_0(val) bfin_write32(MXVR_INT_EN_0, val)
253 #define bfin_write_MXVR_INT_EN_1(val) bfin_write32(MXVR_INT_EN_1, val)
263 #define bfin_write_MXVR_LADDR(val) bfin_write32(MXVR_LADDR, val)
267 #define bfin_write_MXVR_AADDR(val) bfin_write32(MXVR_AADDR, val)
272 #define bfin_write_MXVR_ALLOC_0(val) bfin_write32(MXVR_ALLOC_0, val)
274 #define bfin_write_MXVR_ALLOC_1(val) bfin_write32(MXVR_ALLOC_1, val)
276 #define bfin_write_MXVR_ALLOC_2(val) bfin_write32(MXVR_ALLOC_2, val)
278 #define bfin_write_MXVR_ALLOC_3(val) bfin_write32(MXVR_ALLOC_3, val)
280 #define bfin_write_MXVR_ALLOC_4(val) bfin_write32(MXVR_ALLOC_4, val)
282 #define bfin_write_MXVR_ALLOC_5(val) bfin_write32(MXVR_ALLOC_5, val)
284 #define bfin_write_MXVR_ALLOC_6(val) bfin_write32(MXVR_ALLOC_6, val)
286 #define bfin_write_MXVR_ALLOC_7(val) bfin_write32(MXVR_ALLOC_7, val)
288 #define bfin_write_MXVR_ALLOC_8(val) bfin_write32(MXVR_ALLOC_8, val)
290 #define bfin_write_MXVR_ALLOC_9(val) bfin_write32(MXVR_ALLOC_9, val)
292 #define bfin_write_MXVR_ALLOC_10(val) bfin_write32(MXVR_ALLOC_10, val)
294 #define bfin_write_MXVR_ALLOC_11(val) bfin_write32(MXVR_ALLOC_11, val)
296 #define bfin_write_MXVR_ALLOC_12(val) bfin_write32(MXVR_ALLOC_12, val)
298 #define bfin_write_MXVR_ALLOC_13(val) bfin_write32(MXVR_ALLOC_13, val)
300 #define bfin_write_MXVR_ALLOC_14(val) bfin_write32(MXVR_ALLOC_14, val)
305 #define bfin_write_MXVR_SYNC_LCHAN_0(val) bfin_write32(MXVR_SYNC_LCHAN_0, val)
307 #define bfin_write_MXVR_SYNC_LCHAN_1(val) bfin_write32(MXVR_SYNC_LCHAN_1, val)
309 #define bfin_write_MXVR_SYNC_LCHAN_2(val) bfin_write32(MXVR_SYNC_LCHAN_2, val)
311 #define bfin_write_MXVR_SYNC_LCHAN_3(val) bfin_write32(MXVR_SYNC_LCHAN_3, val)
313 #define bfin_write_MXVR_SYNC_LCHAN_4(val) bfin_write32(MXVR_SYNC_LCHAN_4, val)
315 #define bfin_write_MXVR_SYNC_LCHAN_5(val) bfin_write32(MXVR_SYNC_LCHAN_5, val)
317 #define bfin_write_MXVR_SYNC_LCHAN_6(val) bfin_write32(MXVR_SYNC_LCHAN_6, val)
319 #define bfin_write_MXVR_SYNC_LCHAN_7(val) bfin_write32(MXVR_SYNC_LCHAN_7, val)
324 #define bfin_write_MXVR_DMA0_CONFIG(val) bfin_write32(MXVR_DMA0_CONFIG, val)
326 #define bfin_write_MXVR_DMA0_START_ADDR(val) bfin_write32(MXVR_DMA0_START_ADDR)
330 #define bfin_write_MXVR_DMA0_CURR_ADDR(val) bfin_write32(MXVR_DMA0_CURR_ADDR)
337 #define bfin_write_MXVR_DMA1_CONFIG(val) bfin_write32(MXVR_DMA1_CONFIG, val)
339 #define bfin_write_MXVR_DMA1_START_ADDR(val) bfin_write32(MXVR_DMA1_START_ADDR)
343 #define bfin_write_MXVR_DMA1_CURR_ADDR(val) bfin_write32(MXVR_DMA1_CURR_ADDR)
350 #define bfin_write_MXVR_DMA2_CONFIG(val) bfin_write32(MXVR_DMA2_CONFIG, val)
352 #define bfin_write_MXVR_DMA2_START_ADDR(val) bfin_write32(MXVR_DMA2_START_ADDR)
356 #define bfin_write_MXVR_DMA2_CURR_ADDR(val) bfin_write32(MXVR_DMA2_CURR_ADDR)
363 #define bfin_write_MXVR_DMA3_CONFIG(val) bfin_write32(MXVR_DMA3_CONFIG, val)
365 #define bfin_write_MXVR_DMA3_START_ADDR(val) bfin_write32(MXVR_DMA3_START_ADDR)
369 #define bfin_write_MXVR_DMA3_CURR_ADDR(val) bfin_write32(MXVR_DMA3_CURR_ADDR)
376 #define bfin_write_MXVR_DMA4_CONFIG(val) bfin_write32(MXVR_DMA4_CONFIG, val)
378 #define bfin_write_MXVR_DMA4_START_ADDR(val) bfin_write32(MXVR_DMA4_START_ADDR)
382 #define bfin_write_MXVR_DMA4_CURR_ADDR(val) bfin_write32(MXVR_DMA4_CURR_ADDR)
389 #define bfin_write_MXVR_DMA5_CONFIG(val) bfin_write32(MXVR_DMA5_CONFIG, val)
391 #define bfin_write_MXVR_DMA5_START_ADDR(val) bfin_write32(MXVR_DMA5_START_ADDR)
395 #define bfin_write_MXVR_DMA5_CURR_ADDR(val) bfin_write32(MXVR_DMA5_CURR_ADDR)
402 #define bfin_write_MXVR_DMA6_CONFIG(val) bfin_write32(MXVR_DMA6_CONFIG, val)
404 #define bfin_write_MXVR_DMA6_START_ADDR(val) bfin_write32(MXVR_DMA6_START_ADDR)
408 #define bfin_write_MXVR_DMA6_CURR_ADDR(val) bfin_write32(MXVR_DMA6_CURR_ADDR)
415 #define bfin_write_MXVR_DMA7_CONFIG(val) bfin_write32(MXVR_DMA7_CONFIG, val)
417 #define bfin_write_MXVR_DMA7_START_ADDR(val) bfin_write32(MXVR_DMA7_START_ADDR)
421 #define bfin_write_MXVR_DMA7_CURR_ADDR(val) bfin_write32(MXVR_DMA7_CURR_ADDR)
430 #define bfin_write_MXVR_APRB_START_ADDR(val) bfin_write32(MXVR_APRB_START_ADDR)
432 #define bfin_write_MXVR_APRB_CURR_ADDR(val) bfin_write32(MXVR_APRB_CURR_ADDR)
434 #define bfin_write_MXVR_APTB_START_ADDR(val) bfin_write32(MXVR_APTB_START_ADDR)
436 #define bfin_write_MXVR_APTB_CURR_ADDR(val) bfin_write32(MXVR_APTB_CURR_ADDR)
441 #define bfin_write_MXVR_CM_CTL(val) bfin_write32(MXVR_CM_CTL, val)
443 #define bfin_write_MXVR_CMRB_START_ADDR(val) bfin_write32(MXVR_CMRB_START_ADDR)
445 #define bfin_write_MXVR_CMRB_CURR_ADDR(val) bfin_write32(MXVR_CMRB_CURR_ADDR)
447 #define bfin_write_MXVR_CMTB_START_ADDR(val) bfin_write32(MXVR_CMTB_START_ADDR)
449 #define bfin_write_MXVR_CMTB_CURR_ADDR(val) bfin_write32(MXVR_CMTB_CURR_ADDR)
454 #define bfin_write_MXVR_RRDB_START_ADDR(val) bfin_write32(MXVR_RRDB_START_ADDR)
456 #define bfin_write_MXVR_RRDB_CURR_ADDR(val) bfin_write32(MXVR_RRDB_CURR_ADDR)
461 #define bfin_write_MXVR_PAT_DATA_0(val) bfin_write32(MXVR_PAT_DATA_0, val)
463 #define bfin_write_MXVR_PAT_EN_0(val) bfin_write32(MXVR_PAT_EN_0, val)
465 #define bfin_write_MXVR_PAT_DATA_1(val) bfin_write32(MXVR_PAT_DATA_1, val)
467 #define bfin_write_MXVR_PAT_EN_1(val) bfin_write32(MXVR_PAT_EN_1, val)
479 #define bfin_write_MXVR_ROUTING_0(val) bfin_write32(MXVR_ROUTING_0, val)
481 #define bfin_write_MXVR_ROUTING_1(val) bfin_write32(MXVR_ROUTING_1, val)
483 #define bfin_write_MXVR_ROUTING_2(val) bfin_write32(MXVR_ROUTING_2, val)
485 #define bfin_write_MXVR_ROUTING_3(val) bfin_write32(MXVR_ROUTING_3, val)
487 #define bfin_write_MXVR_ROUTING_4(val) bfin_write32(MXVR_ROUTING_4, val)
489 #define bfin_write_MXVR_ROUTING_5(val) bfin_write32(MXVR_ROUTING_5, val)
491 #define bfin_write_MXVR_ROUTING_6(val) bfin_write32(MXVR_ROUTING_6, val)
493 #define bfin_write_MXVR_ROUTING_7(val) bfin_write32(MXVR_ROUTING_7, val)
495 #define bfin_write_MXVR_ROUTING_8(val) bfin_write32(MXVR_ROUTING_8, val)
497 #define bfin_write_MXVR_ROUTING_9(val) bfin_write32(MXVR_ROUTING_9, val)
499 #define bfin_write_MXVR_ROUTING_10(val) bfin_write32(MXVR_ROUTING_10, val)
501 #define bfin_write_MXVR_ROUTING_11(val) bfin_write32(MXVR_ROUTING_11, val)
503 #define bfin_write_MXVR_ROUTING_12(val) bfin_write32(MXVR_ROUTING_12, val)
505 #define bfin_write_MXVR_ROUTING_13(val) bfin_write32(MXVR_ROUTING_13, val)
507 #define bfin_write_MXVR_ROUTING_14(val) bfin_write32(MXVR_ROUTING_14, val)
514 #define bfin_write_MXVR_CLK_CTL(val) bfin_write32(MXVR_CLK_CTL, val)
516 #define bfin_write_MXVR_CDRPLL_CTL(val) bfin_write32(MXVR_CDRPLL_CTL, val)
518 #define bfin_write_MXVR_FMPLL_CTL(val) bfin_write32(MXVR_FMPLL_CTL, val)
1329 #define bfin_write_SDH_ARGUMENT(val) bfin_write32(SDH_ARGUMENT, val)
1335 #define bfin_write_SDH_RESPONSE0(val) bfin_write32(SDH_RESPONSE0, val)
1337 #define bfin_write_SDH_RESPONSE1(val) bfin_write32(SDH_RESPONSE1, val)
1339 #define bfin_write_SDH_RESPONSE2(val) bfin_write32(SDH_RESPONSE2, val)
1341 #define bfin_write_SDH_RESPONSE3(val) bfin_write32(SDH_RESPONSE3, val)
1343 #define bfin_write_SDH_DATA_TIMER(val) bfin_write32(SDH_DATA_TIMER, val)
1351 #define bfin_write_SDH_STATUS(val) bfin_write32(SDH_STATUS, val)
1355 #define bfin_write_SDH_MASK0(val) bfin_write32(SDH_MASK0, val)
1357 #define bfin_write_SDH_MASK1(val) bfin_write32(SDH_MASK1, val)
1361 #define bfin_write_SDH_FIFO(val) bfin_write32(SDH_FIFO, val)
1852 #define bfin_write_PIXC_RYCON(val) bfin_write32(PIXC_RYCON, val)
1854 #define bfin_write_PIXC_GUCON(val) bfin_write32(PIXC_GUCON, val)
1856 #define bfin_write_PIXC_BVCON(val) bfin_write32(PIXC_BVCON, val)
1858 #define bfin_write_PIXC_CCBIAS(val) bfin_write32(PIXC_CCBIAS, val)
1860 #define bfin_write_PIXC_TC(val) bfin_write32(PIXC_TC, val)