Lines Matching refs:Line
288 #define FFLCR __REG(0x4010000C) /* Line Control Register (read/write) */
290 #define FFLSR __REG(0x40100014) /* Line Status Register (read only) */
304 #define BTLCR __REG(0x4020000C) /* Line Control Register (read/write) */
306 #define BTLSR __REG(0x40200014) /* Line Status Register (read only) */
320 #define STLCR __REG(0x4070000C) /* Line Control Register (read/write) */
322 #define STLSR __REG(0x40700014) /* Line Status Register (read only) */
336 #define HWLCR __REG(0x4160000C) /* Line Control Register (read/write) */
338 #define HWLSR __REG(0x41600014) /* Line Status Register (read only) */
353 #define IER_RLSE (1 << 2) /* Receiver Line Status Interrupt Enable */
1901 #define LCCR1_PPL Fld (10, 0) /* Pixels Per Line - 1 */
1910 #define LCCR1_ELW Fld (8, 16) /* End-of-Line pixel clock Wait */
1912 #define LCCR1_EndLnDel(Tpix) /* End-of-Line Delay */ \
1916 #define LCCR1_BLW Fld (8, 24) /* Beginning-of-Line pixel clock */
1918 #define LCCR1_BegLnDel(Tpix) /* Beginning-of-Line Delay */ \
1923 #define LCCR2_LPP Fld (10, 0) /* Line Per Panel - 1 */
1924 #define LCCR2_DisHght(Line) /* Display Height [1..1024 lines] */ \
1925 (((Line) - 1) << FShft (LCCR2_LPP))