Lines Matching defs:div
114 u32 div, brg;
116 for (div = 0; div < 4; div++) {
117 brg = mainclk_hz / speed_hz / (4 << div);
121 break; /* set lowest brg (div is == 0) */
124 break; /* we have valid brg and div */
126 if (div == 4) {
127 div = 3; /* speed_hz too small */
128 brg = (63 + 1); /* set highest brg and div */
131 return PSC_SPICFG_SET_BAUD(brg) | PSC_SPICFG_SET_DIV(div);
700 /* use minimal allowed brg and div values as initial setting: */
878 * produce valid brg and div