Lines Matching refs:LSB
86 #define LSB(x) ((uint8_t)(x))
766 * LSB BIT 0 = Enable Hard Loop Id
767 * LSB BIT 1 = Enable Fairness
768 * LSB BIT 2 = Enable Full-Duplex
769 * LSB BIT 3 = Enable Fast Posting
770 * LSB BIT 4 = Enable Target Mode
771 * LSB BIT 5 = Disable Initiator Mode
772 * LSB BIT 6 = Enable ADISC
773 * LSB BIT 7 = Enable Target Inquiry Data
811 * LSB BIT 0 = Timer Operation mode bit 0
812 * LSB BIT 1 = Timer Operation mode bit 1
813 * LSB BIT 2 = Timer Operation mode bit 2
814 * LSB BIT 3 = Timer Operation mode bit 3
815 * LSB BIT 4 = Init Config Mode bit 0
816 * LSB BIT 5 = Init Config Mode bit 1
817 * LSB BIT 6 = Init Config Mode bit 2
818 * LSB BIT 7 = Enable Non part on LIHA failure
835 * LSB BIT 0 = Enable Read xfr_rdy
836 * LSB BIT 1 = Soft ID only
837 * LSB BIT 2 =
838 * LSB BIT 3 =
839 * LSB BIT 4 = FCP RSP Payload [0]
840 * LSB BIT 5 = FCP RSP Payload [1] / Sbus enable - 2200
841 * LSB BIT 6 = Enable Out-of-Order frame handling
842 * LSB BIT 7 = Disable Automatic PLOGI on Local Loop
901 * LSB BIT 0 = Enable Hard Loop Id
902 * LSB BIT 1 = Enable Fairness
903 * LSB BIT 2 = Enable Full-Duplex
904 * LSB BIT 3 = Enable Fast Posting
905 * LSB BIT 4 = Enable Target Mode
906 * LSB BIT 5 = Disable Initiator Mode
907 * LSB BIT 6 = Enable ADISC
908 * LSB BIT 7 = Enable Target Inquiry Data
933 * LSB BIT 0 = Timer Operation mode bit 0
934 * LSB BIT 1 = Timer Operation mode bit 1
935 * LSB BIT 2 = Timer Operation mode bit 2
936 * LSB BIT 3 = Timer Operation mode bit 3
937 * LSB BIT 4 = Init Config Mode bit 0
938 * LSB BIT 5 = Init Config Mode bit 1
939 * LSB BIT 6 = Init Config Mode bit 2
940 * LSB BIT 7 = Enable Non part on LIHA failure
957 * LSB BIT 0 = Enable Read xfr_rdy
958 * LSB BIT 1 = Soft ID only
959 * LSB BIT 2 =
960 * LSB BIT 3 =
961 * LSB BIT 4 = FCP RSP Payload [0]
962 * LSB BIT 5 = FCP RSP Payload [1] / Sbus enable - 2200
963 * LSB BIT 6 = Enable Out-of-Order frame handling
964 * LSB BIT 7 = Disable Automatic PLOGI on Local Loop
981 * LSB BIT 0 = Tx Sensitivity 1G bit 0
982 * LSB BIT 1 = Tx Sensitivity 1G bit 1
983 * LSB BIT 2 = Tx Sensitivity 1G bit 2
984 * LSB BIT 3 = Tx Sensitivity 1G bit 3
985 * LSB BIT 4 = Rx Sensitivity 1G bit 0
986 * LSB BIT 5 = Rx Sensitivity 1G bit 1
987 * LSB BIT 6 = Rx Sensitivity 1G bit 2
988 * LSB BIT 7 = Rx Sensitivity 1G bit 3
999 * LSB BIT 0 = Output Swing 1G bit 0
1000 * LSB BIT 1 = Output Swing 1G bit 1
1001 * LSB BIT 2 = Output Swing 1G bit 2
1002 * LSB BIT 3 = Output Emphasis 1G bit 0
1003 * LSB BIT 4 = Output Emphasis 1G bit 1
1004 * LSB BIT 5 = Output Swing 2G bit 0
1005 * LSB BIT 6 = Output Swing 2G bit 1
1006 * LSB BIT 7 = Output Swing 2G bit 2
1022 * LSB BIT 0 = Enable spinup delay
1023 * LSB BIT 1 = Disable BIOS
1024 * LSB BIT 2 = Enable Memory Map BIOS
1025 * LSB BIT 3 = Enable Selectable Boot
1026 * LSB BIT 4 = Disable RISC code load
1027 * LSB BIT 5 = Set cache line size 1
1028 * LSB BIT 6 = PCI Parity Disable
1029 * LSB BIT 7 = Enable extended logging
1094 * LSB BIT 0 = External GBIC
1095 * LSB BIT 1 = Risc RAM parity
1096 * LSB BIT 2 = Buffer Plus Module
1097 * LSB BIT 3 = Multi Chip Adapter
1098 * LSB BIT 4 = Internal connector
1099 * LSB BIT 5 =
1100 * LSB BIT 6 =
1101 * LSB BIT 7 =