Lines Matching refs:base
467 unsigned int base = SCpnt->device->host->io_port;
481 phase = nsp32_read1(base, SCSI_BUS_MONITOR);
518 // nsp_dbg(NSP32_DEBUG_AUTOSCSI, "sel time out=0x%x\n", nsp32_read2(base, SEL_TIME_OUT));
519 // nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME);
579 nsp32_write4(base, SGT_ADR, data->auto_paddr);
580 nsp32_write2(base, COMMAND_CONTROL, CLEAR_CDB_FIFO_POINTER |
586 ret = nsp32_arbitration(SCpnt, base);
598 unsigned int base = SCpnt->device->host->io_port;
613 nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
618 phase = nsp32_read1(base, SCSI_BUS_MONITOR);
629 execph = nsp32_read2(base, SCSI_EXECUTE_PHASE);
634 nsp32_write2(base, COMMAND_CONTROL, CLEAR_CDB_FIFO_POINTER);
640 nsp32_write1(base, COMMAND_DATA, SCpnt->cmnd[i]);
647 nsp32_write1(base, SCSI_OUT_LATCH_TARGET_ID, BIT(host_id) | BIT(target));
674 nsp32_write4(base, SCSI_MSG_OUT, msgout);
677 nsp32_write4(base, SCSI_MSG_OUT, 0);
683 nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME);
691 nsp32_write1(base, SREQ_SMPL_RATE, data->cur_target->sample_reg);
696 nsp32_write1(base, SET_ARBIT, ARBIT_CLEAR);
702 nsp32_write1(base, SYNC_REG, data->cur_target->syncreg);
707 nsp32_write1(base, ACK_WIDTH, data->cur_target->ackwidth);
711 nsp32_read1(base, SYNC_REG), nsp32_read1(base, ACK_WIDTH),
712 nsp32_read4(base, SGT_ADR), nsp32_read1(base, SCSI_OUT_LATCH_TARGET_ID));
719 nsp32_write4(base, SGT_ADR, data->cur_lunt->sglun_paddr);
735 nsp32_write2(base, TRANSFER_CONTROL, command);
745 nsp32_write2(base, COMMAND_CONTROL, command);
750 status = nsp32_arbitration(SCpnt, base);
756 nsp32_write2(base, IRQ_CONTROL, 0);
770 static int nsp32_arbitration(struct scsi_cmnd *SCpnt, unsigned int base)
777 arbit = nsp32_read1(base, ARBIT_STATUS);
788 nsp32_index_write1(base, EXT_PORT, LED_ON); /* PCI LED on */
806 nsp32_write1(base, SET_ARBIT, ARBIT_CLEAR);
823 unsigned int base = SCpnt->device->host->io_port;
831 tmpid = nsp32_read1(base, RESELECT_ID);
861 nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK);
1083 unsigned int base = data->BaseAddress;
1088 lc_reg = nsp32_index_read4(base, CFG_LATE_CACHE);
1091 nsp32_index_write2(base, CFG_LATE_CACHE, lc_reg & 0xffff);
1094 nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
1095 nsp32_write2(base, TRANSFER_CONTROL, 0);
1096 nsp32_write4(base, BM_CNT, 0);
1097 nsp32_write2(base, SCSI_EXECUTE_PHASE, 0);
1100 irq_stat = nsp32_read2(base, IRQ_STATUS);
1110 nsp32_index_write1(base, FIFO_FULL_SHLD_COUNT, 0x40);
1111 nsp32_index_write1(base, FIFO_EMPTY_SHLD_COUNT, 0x40);
1113 nsp32_index_write1(base, FIFO_FULL_SHLD_COUNT, 0x10);
1114 nsp32_index_write1(base, FIFO_EMPTY_SHLD_COUNT, 0x60);
1120 nsp32_index_read1(base, FIFO_FULL_SHLD_COUNT),
1121 nsp32_index_read1(base, FIFO_EMPTY_SHLD_COUNT));
1123 nsp32_index_write1(base, CLOCK_DIV, data->clock);
1124 nsp32_index_write1(base, BM_CYCLE, MEMRD_CMD1 | SGT_AUTO_PARA_MEMED_CMD);
1125 nsp32_write1(base, PARITY_CONTROL, 0); /* parity check is disable */
1142 nsp32_index_write2(base, MISC_WR,
1150 nsp32_index_write1(base, TERM_PWR_CONTROL, 0);
1151 power = nsp32_index_read1(base, TERM_PWR_CONTROL);
1154 nsp32_index_write1(base, TERM_PWR_CONTROL, BPWR);
1157 nsp32_write2(base, TIMER_SET, TIMER_STOP);
1158 nsp32_write2(base, TIMER_SET, TIMER_STOP); /* Required 2 times */
1160 nsp32_write1(base, SYNC_REG, 0);
1161 nsp32_write1(base, ACK_WIDTH, 0);
1162 nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME);
1168 nsp32_index_write2(base, IRQ_SELECT, IRQSELECT_TIMER_IRQ |
1177 nsp32_write2(base, IRQ_CONTROL, 0);
1180 nsp32_index_write1(base, EXT_PORT_DDR, LED_OFF);
1181 nsp32_index_write1(base, EXT_PORT, LED_OFF);
1191 unsigned int base = data->BaseAddress;
1209 irq_stat = nsp32_read2(base, IRQ_STATUS);
1218 nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
1220 busmon = nsp32_read1(base, SCSI_BUS_MONITOR);
1223 trans_stat = nsp32_read2(base, TRANSFER_STATUS);
1237 nsp32_write2(base, TIMER_SET, TIMER_STOP);
1266 auto_stat = nsp32_read2(base, SCSI_EXECUTE_PHASE);
1267 nsp32_write2(base, SCSI_EXECUTE_PHASE, 0);
1301 ((nsp32_read2(base, FIFO_REST_CNT) & FIFO_REST_MASK) != 0)) {
1313 nsp32_read4(base, BM_CNT));
1315 nsp32_read4(base, SGT_ADR));
1317 nsp32_read4(base, SACK_CNT));
1319 nsp32_read4(base, SAVED_SACK_CNT));
1356 SCpnt->result = (int)nsp32_read1(base, SCSI_CSB_IN);
1409 SCpnt->SCp.Status = nsp32_read1(base, SCSI_CSB_IN);
1460 nsp32_write2(base, IRQ_CONTROL, 0);
1504 unsigned int base;
1524 base = host->io_port;
1531 SPRINTF("MMIO(virtual address): 0x%lx-0x%lx\n", host->base, host->base + data->MmioLength - 1);
1533 SPRINTF("Chip revision: 0x%x\n", (nsp32_read2(base, INDEX_REG) >> 8) & 0xff);
1535 mode_reg = nsp32_index_read1(base, CHIP_MODE);
1607 unsigned int base = SCpnt->device->host->io_port;
1631 nsp32_write2(base, TRANSFER_CONTROL, 0);
1632 nsp32_write4(base, BM_CNT, 0);
1662 unsigned int base = SCpnt->device->host->io_port;
1667 nsp32_write4(base, BM_CNT, 0);
1668 nsp32_write2(base, TRANSFER_CONTROL, 0);
1695 sacklen = nsp32_read4(base, SACK_CNT );
1696 s_sacklen = nsp32_read4(base, SAVED_SACK_CNT);
1779 SCpnt->SCp.Status = nsp32_read1(base, SCSI_CSB_IN);
1792 SCpnt->SCp.Status = nsp32_read1(base, SCSI_CSB_IN);
1892 unsigned int base = SCpnt->device->host->io_port;
1936 nsp32_write2(base, COMMAND_CONTROL,
1947 nsp32_write1(base, SCSI_DATA_WITH_ACK, data->msgoutbuf[i]);
1951 nsp32_read1(base, SCSI_BUS_MONITOR));
1968 unsigned int base = data->BaseAddress;
1981 nsp32_write1(base, SYNC_REG, data->cur_target->syncreg);
1986 nsp32_write1(base, ACK_WIDTH, data->cur_target->ackwidth);
1991 nsp32_write1(base, SREQ_SMPL_RATE, data->cur_target->sample_reg);
1996 nsp32_write4(base, SGT_ADR, data->cur_lunt->sglun_paddr);
2012 nsp32_write2(base, TRANSFER_CONTROL, transfer);
2022 nsp32_write2(base, COMMAND_CONTROL, command);
2036 unsigned int base = SCpnt->device->host->io_port;
2050 msg = nsp32_read1(base, SCSI_DATA_IN);
2111 s_sacklen = nsp32_read4(base, SAVED_SACK_CNT);
2123 nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK);
2130 nsp32_write4(base, SGT_ADR, new_sgtp);
2274 nsp32_write4(base, SCSI_MSG_OUT, 0);
2566 unsigned int base = data->BaseAddress;
2577 bus = nsp32_read1(base, SCSI_BUS_MONITOR);
2595 unsigned int base = data->BaseAddress;
2606 bus = nsp32_read1(base, SCSI_BUS_MONITOR);
2626 unsigned int base = data->BaseAddress;
2629 busctrl = nsp32_read1(base, SCSI_BUS_CONTROL);
2631 nsp32_write1(base, SCSI_BUS_CONTROL, busctrl);
2639 unsigned int base = data->BaseAddress;
2642 busctrl = nsp32_read1(base, SCSI_BUS_CONTROL);
2644 nsp32_write1(base, SCSI_BUS_CONTROL, busctrl);
2700 host->base = (unsigned long)data->MmioAddress;
2943 unsigned int base = SCpnt->device->host->io_port;
2958 nsp32_write2(base, TRANSFER_CONTROL, 0);
2959 nsp32_write2(base, BM_CNT, 0);
2971 unsigned int base = SCpnt->device->host->io_port;
2978 nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
2980 nsp32_write2(base, IRQ_CONTROL, 0);
2988 unsigned int base = data->BaseAddress;
2999 nsp32_write2(base, TRANSFER_CONTROL, 0);
3000 nsp32_write4(base, BM_CNT, 0);
3001 nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK);
3017 nsp32_write1(base, SCSI_BUS_CONTROL, BUSCTL_RST);
3019 nsp32_write1(base, SCSI_BUS_CONTROL, 0);
3021 intrdat = nsp32_read2(base, IRQ_STATUS); /* dummy read */
3031 unsigned int base = SCpnt->device->host->io_port;
3040 nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
3042 nsp32_write2(base, IRQ_CONTROL, 0);
3334 int base = data->BaseAddress;
3337 tmp = nsp32_index_read1(base, SERIAL_ROM_CTL);
3345 nsp32_index_write1(base, SERIAL_ROM_CTL, tmp);
3352 int base = data->BaseAddress;
3361 tmp = nsp32_index_read1(base, SERIAL_ROM_CTL) & bit;