Lines Matching defs:ha
438 static gdth_evt_str *gdth_store_event(gdth_ha_str *ha, ushort source,
440 static int gdth_read_event(gdth_ha_str *ha, int handle, gdth_evt_str *estr);
441 static void gdth_readapp_event(gdth_ha_str *ha, unchar application,
456 static int gdth_init_eisa(ushort eisa_adr,gdth_ha_str *ha);
457 static int gdth_init_isa(ulong32 bios_adr,gdth_ha_str *ha);
458 static int gdth_init_pci(gdth_pci_str *pcistr,gdth_ha_str *ha);
977 static int __init gdth_init_eisa(ushort eisa_adr,gdth_ha_str *ha)
1006 ha->bmic = eisa_adr;
1007 ha->brd_phys = (ulong32)eisa_adr >> 12;
1016 ha->oem_id = OEM_ID_ICP;
1017 ha->type = GDT_EISA;
1018 ha->stype = id;
1030 ha->irq = inb(eisa_adr+MAILBOXREG);
1032 TRACE2(("GDT3000/3020: IRQ=%d\n",ha->irq));
1034 if (ha->irq == 0) {
1044 ha->irq = irq[i];
1048 ha->irq);
1059 ha->irq = gdth_irq_tab[eisacf];
1060 ha->oem_id = OEM_ID_ICP;
1061 ha->type = GDT_EISA;
1062 ha->stype = id;
1065 ha->dma64_support = 0;
1070 static int __init gdth_init_isa(ulong32 bios_adr,gdth_ha_str *ha)
1079 ha->brd = ioremap(bios_adr, sizeof(gdt2_dpram_str));
1080 if (ha->brd == NULL) {
1084 dp2_ptr = ha->brd;
1090 iounmap(ha->brd);
1106 ha->drq = gdth_drq_tab[i];
1114 ha->irq = gdth_irq_tab[i];
1125 iounmap(ha->brd);
1135 iounmap(ha->brd);
1139 ha->oem_id = OEM_ID_ICP;
1140 ha->type = GDT_ISA;
1141 ha->ic_all_size = sizeof(dp2_ptr->u);
1142 ha->stype= GDT2_ID;
1143 ha->brd_phys = bios_adr >> 4;
1157 iounmap(ha->brd);
1165 ha->dma64_support = 0;
1170 static int __init gdth_init_pci(gdth_pci_str *pcistr,gdth_ha_str *ha)
1183 ha->oem_id = OEM_ID_INTEL;
1185 ha->oem_id = OEM_ID_ICP;
1186 ha->brd_phys = (pcistr->bus << 8) | (pcistr->device_fn & 0xf8);
1187 ha->stype = (ulong32)pcistr->device_id;
1188 ha->subdevice_id = pcistr->subdevice_id;
1189 ha->irq = pcistr->irq;
1190 ha->pdev = pcistr->pdev;
1192 if (ha->stype <= PCI_DEVICE_ID_VORTEX_GDT6000B) { /* GDT6000/B */
1193 TRACE2(("init_pci() dpmem %lx irq %d\n",pcistr->dpmem,ha->irq));
1194 ha->brd = ioremap(pcistr->dpmem, sizeof(gdt6_dpram_str));
1195 if (ha->brd == NULL) {
1200 dp6_ptr = ha->brd;
1207 iounmap(ha->brd);
1208 ha->brd = ioremap(i, sizeof(ushort));
1209 if (ha->brd == NULL) {
1213 if (gdth_readw(ha->brd) != 0xffff) {
1217 iounmap(ha->brd);
1220 ha->brd = ioremap(i, sizeof(gdt6_dpram_str));
1221 if (ha->brd == NULL) {
1225 dp6_ptr = ha->brd;
1235 iounmap(ha->brd);
1242 iounmap(ha->brd);
1260 iounmap(ha->brd);
1270 iounmap(ha->brd);
1274 ha->type = GDT_PCI;
1275 ha->ic_all_size = sizeof(dp6_ptr->u);
1289 iounmap(ha->brd);
1297 ha->dma64_support = 0;
1299 } else if (ha->stype <= PCI_DEVICE_ID_VORTEX_GDT6555) { /* GDT6110, ... */
1300 ha->plx = (gdt6c_plx_regs *)pcistr->io;
1302 pcistr->dpmem,ha->irq));
1303 ha->brd = ioremap(pcistr->dpmem, sizeof(gdt6c_dpram_str));
1304 if (ha->brd == NULL) {
1306 iounmap(ha->brd);
1310 dp6c_ptr = ha->brd;
1317 iounmap(ha->brd);
1318 ha->brd = ioremap(i, sizeof(ushort));
1319 if (ha->brd == NULL) {
1323 if (gdth_readw(ha->brd) != 0xffff) {
1327 iounmap(ha->brd);
1330 ha->brd = ioremap(i, sizeof(gdt6c_dpram_str));
1331 if (ha->brd == NULL) {
1335 dp6c_ptr = ha->brd;
1345 iounmap(ha->brd);
1352 iounmap(ha->brd);
1357 outb(0x00,PTR2USHORT(&ha->plx->control1));
1358 outb(0xff,PTR2USHORT(&ha->plx->edoor_reg));
1366 outb(1,PTR2USHORT(&ha->plx->ldoor_reg));
1373 iounmap(ha->brd);
1382 iounmap(ha->brd);
1386 ha->type = GDT_PCINEW;
1387 ha->ic_all_size = sizeof(dp6c_ptr->u);
1396 outb(1,PTR2USHORT(&ha->plx->ldoor_reg));
1403 iounmap(ha->brd);
1410 ha->dma64_support = 0;
1413 TRACE2(("init_pci_mpr() dpmem %lx irq %d\n",pcistr->dpmem,ha->irq));
1414 ha->brd = ioremap(pcistr->dpmem, sizeof(gdt6m_dpram_str));
1415 if (ha->brd == NULL) {
1432 dp6m_ptr = ha->brd;
1446 iounmap(ha->brd);
1447 ha->brd = ioremap(i, sizeof(ushort));
1448 if (ha->brd == NULL) {
1452 if (gdth_readw(ha->brd) != 0xffff) {
1456 iounmap(ha->brd);
1459 ha->brd = ioremap(i, sizeof(gdt6m_dpram_str));
1460 if (ha->brd == NULL) {
1464 dp6m_ptr = ha->brd;
1474 iounmap(ha->brd);
1495 iounmap(ha->brd);
1504 iounmap(ha->brd);
1508 ha->type = GDT_PCIMPR;
1509 ha->ic_all_size = sizeof(dp6m_ptr->u);
1523 iounmap(ha->brd);
1538 iounmap(ha->brd);
1546 ha->dma64_support = 0;
1548 ha->dma64_support = 1;
1559 gdth_ha_str *ha;
1566 ha = HADATA(gdth_ctr_tab[hanum]);
1567 spin_lock_irqsave(&ha->smp_lock, flags);
1569 if (ha->type == GDT_EISA) {
1570 outb(0xff, ha->bmic + EDOORREG);
1571 outb(0xff, ha->bmic + EDENABREG);
1572 outb(0x01, ha->bmic + EINTENABREG);
1573 } else if (ha->type == GDT_ISA) {
1574 dp2_ptr = ha->brd;
1578 } else if (ha->type == GDT_PCI) {
1579 dp6_ptr = ha->brd;
1583 } else if (ha->type == GDT_PCINEW) {
1584 outb(0xff, PTR2USHORT(&ha->plx->edoor_reg));
1585 outb(0x03, PTR2USHORT(&ha->plx->control1));
1586 } else if (ha->type == GDT_PCIMPR) {
1587 dp6m_ptr = ha->brd;
1592 spin_unlock_irqrestore(&ha->smp_lock, flags);
1598 register gdth_ha_str *ha;
1606 ha = HADATA(gdth_ctr_tab[i]);
1607 if (ha->irq != (unchar)irq) /* check IRQ */
1609 if (ha->type == GDT_EISA)
1610 *pIStatus = inb((ushort)ha->bmic + EDOORREG);
1611 else if (ha->type == GDT_ISA)
1613 gdth_readb(&((gdt2_dpram_str __iomem *)ha->brd)->u.ic.Cmd_Index);
1614 else if (ha->type == GDT_PCI)
1616 gdth_readb(&((gdt6_dpram_str __iomem *)ha->brd)->u.ic.Cmd_Index);
1617 else if (ha->type == GDT_PCINEW)
1618 *pIStatus = inb(PTR2USHORT(&ha->plx->edoor_reg));
1619 else if (ha->type == GDT_PCIMPR)
1621 gdth_readb(&((gdt6m_dpram_str __iomem *)ha->brd)->i960r.edoor_reg);
1632 register gdth_ha_str *ha;
1637 ha = HADATA(gdth_ctr_tab[hanum]);
1638 if (ha->type == GDT_EISA)
1639 gdtsema0 = (int)inb(ha->bmic + SEMA0REG);
1640 else if (ha->type == GDT_ISA)
1641 gdtsema0 = (int)gdth_readb(&((gdt2_dpram_str __iomem *)ha->brd)->u.ic.Sema0);
1642 else if (ha->type == GDT_PCI)
1643 gdtsema0 = (int)gdth_readb(&((gdt6_dpram_str __iomem *)ha->brd)->u.ic.Sema0);
1644 else if (ha->type == GDT_PCINEW)
1645 gdtsema0 = (int)inb(PTR2USHORT(&ha->plx->sema0_reg));
1646 else if (ha->type == GDT_PCIMPR)
1648 (int)gdth_readb(&((gdt6m_dpram_str __iomem *)ha->brd)->i960r.sema0_reg);
1656 register gdth_ha_str *ha;
1661 ha = HADATA(gdth_ctr_tab[hanum]);
1663 if (ha->cmd_tab[i].cmnd == UNUSED_CMND) {
1664 ha->cmd_tab[i].cmnd = ha->pccb->RequestBuffer;
1665 ha->cmd_tab[i].service = ha->pccb->Service;
1666 ha->pccb->CommandIndex = (ulong32)i+2;
1676 register gdth_ha_str *ha;
1680 ha = HADATA(gdth_ctr_tab[hanum]);
1681 if (ha->type == GDT_EISA) {
1682 outb(1, ha->bmic + SEMA0REG);
1683 } else if (ha->type == GDT_ISA) {
1684 gdth_writeb(1, &((gdt2_dpram_str __iomem *)ha->brd)->u.ic.Sema0);
1685 } else if (ha->type == GDT_PCI) {
1686 gdth_writeb(1, &((gdt6_dpram_str __iomem *)ha->brd)->u.ic.Sema0);
1687 } else if (ha->type == GDT_PCINEW) {
1688 outb(1, PTR2USHORT(&ha->plx->sema0_reg));
1689 } else if (ha->type == GDT_PCIMPR) {
1690 gdth_writeb(1, &((gdt6m_dpram_str __iomem *)ha->brd)->i960r.sema0_reg);
1697 register gdth_ha_str *ha;
1707 ha = HADATA(gdth_ctr_tab[hanum]);
1708 cp_count = ha->cmd_len;
1709 dp_offset= ha->cmd_offs_dpmem;
1710 cmd_no = ha->cmd_cnt;
1711 cmd_ptr = ha->pccb;
1713 ++ha->cmd_cnt;
1714 if (ha->type == GDT_EISA)
1721 ha->cmd_offs_dpmem += cp_count;
1724 if (ha->type == GDT_ISA) {
1725 dp2_ptr = ha->brd;
1731 } else if (ha->type == GDT_PCI) {
1732 dp6_ptr = ha->brd;
1738 } else if (ha->type == GDT_PCINEW) {
1739 dp6c_ptr = ha->brd;
1745 } else if (ha->type == GDT_PCIMPR) {
1746 dp6m_ptr = ha->brd;
1758 register gdth_ha_str *ha;
1761 ha = HADATA(gdth_ctr_tab[hanum]);
1767 if (ha->cmd_tab[j].cmnd != UNUSED_CMND)
1777 if (ha->pccb->OpCode == GDT_INIT)
1778 ha->pccb->Service |= 0x80;
1780 if (ha->type == GDT_EISA) {
1781 if (ha->pccb->OpCode == GDT_INIT) /* store DMA buffer */
1782 outl(ha->ccb_phys, ha->bmic + MAILBOXREG);
1783 outb(ha->pccb->Service, ha->bmic + LDOORREG);
1784 } else if (ha->type == GDT_ISA) {
1785 gdth_writeb(0, &((gdt2_dpram_str __iomem *)ha->brd)->io.event);
1786 } else if (ha->type == GDT_PCI) {
1787 gdth_writeb(0, &((gdt6_dpram_str __iomem *)ha->brd)->io.event);
1788 } else if (ha->type == GDT_PCINEW) {
1789 outb(1, PTR2USHORT(&ha->plx->ldoor_reg));
1790 } else if (ha->type == GDT_PCIMPR) {
1791 gdth_writeb(1, &((gdt6m_dpram_str __iomem *)ha->brd)->i960r.ldoor_reg);
1798 gdth_ha_str *ha;
1803 ha = HADATA(gdth_ctr_tab[hanum]);
1809 gdth_interrupt((int)ha->irq,ha);
1828 register gdth_ha_str *ha;
1834 ha = HADATA(gdth_ctr_tab[hanum]);
1835 cmd_ptr = ha->pccb;
1854 cmd_ptr->u.ioctl.p_param = ha->scratch_phys;
1856 if (ha->cache_feat & GDT_64BIT) {
1865 if (ha->raw_feat & GDT_64BIT) {
1883 ha->cmd_len = sizeof(gdth_cmd_str);
1884 ha->cmd_offs_dpmem = 0;
1885 ha->cmd_cnt = 0;
1893 if (ha->status != S_BSY || --retries == 0)
1898 return (ha->status != S_OK ? 0:1);
1906 register gdth_ha_str *ha;
1927 ha = HADATA(gdth_ctr_tab[hanum]);
1931 ha->screen_feat = 0;
1935 ha->screen_feat = GDT_64BIT;
1937 if (force_dma32 || (!ok && ha->status == (ushort)S_NOFUNC))
1941 hanum, ha->status);
1973 ha->cache_feat = 0;
1977 ha->cache_feat = GDT_64BIT;
1979 if (force_dma32 || (!ok && ha->status == (ushort)S_NOFUNC))
1983 hanum, ha->status);
1987 cdev_cnt = (ushort)ha->info;
1988 ha->fw_vers = ha->service;
1991 if (ha->type == GDT_PCIMPR) {
1993 pmod = (gdth_perf_modes *)ha->pscratch;
1996 *((ulong64 *)&pmod->st_buff_addr1) = ha->coal_stat_phys;
2020 iocr = (gdth_raw_iochan_str *)ha->pscratch;
2029 ha->bus_cnt = iocr->hdr.chan_count;
2030 for (bus_no = 0; bus_no < ha->bus_cnt; ++bus_no) {
2032 ha->bus_id[bus_no] = iocr->list[bus_no].proc_id;
2034 ha->bus_id[bus_no] = 0xff;
2038 chn = (gdth_getch_str *)ha->pscratch;
2047 hanum, ha->status);
2053 ha->bus_id[bus_no] = chn->siop_id;
2055 ha->bus_id[bus_no] = 0xff;
2057 ha->bus_cnt = (unchar)bus_no;
2059 TRACE2(("gdth_search_drives() %d channels\n",ha->bus_cnt));
2065 hanum, ha->status);
2068 ha->cpar = ((gdth_cinfo_str *)ha->pscratch)->cpar;
2070 ha->cpar.version,ha->cpar.state,ha->cpar.strategy,
2071 ha->cpar.write_back,ha->cpar.block_size));
2074 ha->more_proc = FALSE;
2077 memcpy(&ha->binfo, (gdth_binfo_str *)ha->pscratch,
2082 ha->bfeat = *(gdth_bfeat_str *)ha->pscratch;
2083 ha->more_proc = TRUE;
2087 strcpy(ha->binfo.type_string, gdth_ctr_name(hanum));
2089 TRACE2(("Controller name: %s\n",ha->binfo.type_string));
2092 if (ha->more_proc) {
2094 ioc = (gdth_iochan_str *)ha->pscratch;
2102 for (bus_no = 0; bus_no < ha->bus_cnt; ++bus_no) {
2103 ha->raw[bus_no].address = ioc->list[bus_no].address;
2104 ha->raw[bus_no].local_no = ioc->list[bus_no].local_no;
2107 for (bus_no = 0; bus_no < ha->bus_cnt; ++bus_no) {
2108 ha->raw[bus_no].address = IO_CHANNEL;
2109 ha->raw[bus_no].local_no = bus_no;
2112 for (bus_no = 0; bus_no < ha->bus_cnt; ++bus_no) {
2113 chn = (gdth_getch_str *)ha->pscratch;
2114 chn->channel_no = ha->raw[bus_no].local_no;
2117 ha->raw[bus_no].address | INVALID_CHANNEL,
2119 ha->raw[bus_no].pdev_cnt = chn->drive_cnt;
2123 if (ha->raw[bus_no].pdev_cnt > 0) {
2124 drl = (gdth_drlist_str *)ha->pscratch;
2125 drl->sc_no = ha->raw[bus_no].local_no;
2126 drl->sc_cnt = ha->raw[bus_no].pdev_cnt;
2129 ha->raw[bus_no].address | INVALID_CHANNEL,
2131 for (j = 0; j < ha->raw[bus_no].pdev_cnt; ++j)
2132 ha->raw[bus_no].id_list[j] = drl->sc_list[j];
2134 ha->raw[bus_no].pdev_cnt = 0;
2142 drv_cnt = *(ulong32 *)ha->pscratch;
2146 drv_no = ((ulong32 *)ha->pscratch)[j];
2148 ha->hdr[drv_no].is_logdrv = TRUE;
2153 alst = (gdth_arcdl_str *)ha->pscratch;
2162 ha->hdr[j].is_arraydrv = alst->list[j].is_arrayd;
2163 ha->hdr[j].is_master = alst->list[j].is_master;
2164 ha->hdr[j].is_parity = alst->list[j].is_parity;
2165 ha->hdr[j].is_hotfix = alst->list[j].is_hotfix;
2166 ha->hdr[j].master_no = alst->list[j].cd_handle;
2172 alst2 = &((gdth_alist_str *)ha->pscratch)[j];
2173 ha->hdr[j].is_arraydrv = alst2->is_arrayd;
2174 ha->hdr[j].is_master = alst2->is_master;
2175 ha->hdr[j].is_parity = alst2->is_parity;
2176 ha->hdr[j].is_hotfix = alst2->is_hotfix;
2177 ha->hdr[j].master_no = alst2->cd_handle;
2184 ha->raw_feat = 0;
2188 ha->raw_feat = GDT_64BIT;
2190 if (force_dma32 || (!ok && ha->status == (ushort)S_NOFUNC))
2194 hanum, ha->status);
2205 ha->info));
2206 ha->raw_feat |= (ushort)ha->info;
2216 ha->info));
2217 ha->cache_feat |= (ushort)ha->info;
2226 ha->status));
2229 if (reserve_list[i] == hanum && reserve_list[i+1] < ha->bus_cnt &&
2230 reserve_list[i+2] < ha->tid_cnt && reserve_list[i+3] < MAXLUN) {
2231 TRACE2(("gdth_search_drives(): reserve ha %d bus %d id %d lun %d\n",
2238 hanum, ha->status);
2244 oemstr = (gdth_oem_str_ioctl *)ha->pscratch;
2252 hanum,oemstr->text.oem_company_name,ha->binfo.type_string);
2255 strlcpy(ha->oem_name,oemstr->text.scsi_host_drive_inquiry_vendor_id,
2256 sizeof(ha->oem_name));
2258 strncpy(ha->oem_name,oemstr->text.scsi_host_drive_inquiry_vendor_id,7);
2259 ha->oem_name[7] = '\0';
2265 hanum,ha->binfo.type_string);
2267 if (ha->oem_id == OEM_ID_INTEL)
2268 strlcpy(ha->oem_name,"Intel ", sizeof(ha->oem_name));
2270 strlcpy(ha->oem_name,"ICP ", sizeof(ha->oem_name));
2272 if (ha->oem_id == OEM_ID_INTEL)
2273 strcpy(ha->oem_name,"Intel ");
2275 strcpy(ha->oem_name,"ICP ");
2289 register gdth_ha_str *ha;
2296 ha = HADATA(gdth_ctr_tab[hanum]);
2300 ha->hdr[hdrive].present = TRUE;
2301 ha->hdr[hdrive].size = ha->info;
2304 ha->hdr[hdrive].size &= ~SECS32;
2305 if (ha->info2 == 0) {
2306 gdth_eval_mapping(ha->hdr[hdrive].size,&drv_cyls,&drv_hds,&drv_secs);
2308 drv_hds = ha->info2 & 0xff;
2309 drv_secs = (ha->info2 >> 8) & 0xff;
2310 drv_cyls = (ulong32)ha->hdr[hdrive].size / drv_hds / drv_secs;
2312 ha->hdr[hdrive].heads = (unchar)drv_hds;
2313 ha->hdr[hdrive].secs = (unchar)drv_secs;
2315 ha->hdr[hdrive].size = drv_cyls * drv_hds * drv_secs;
2317 if (ha->cache_feat & GDT_64BIT) {
2319 && ha->info2 != 0) {
2320 ha->hdr[hdrive].size = ((ulong64)ha->info2 << 32) | ha->info;
2324 hdrive,ha->hdr[hdrive].size,drv_hds,drv_secs));
2329 hdrive,ha->info));
2330 ha->hdr[hdrive].devtype = (ushort)ha->info;
2336 hdrive,ha->info));
2338 ha->hdr[hdrive].cluster_type = (unchar)ha->info;
2344 hdrive,ha->info));
2345 ha->hdr[hdrive].rw_attribs = (unchar)ha->info;
2356 register gdth_ha_str *ha;
2363 ha = HADATA(gdth_ctr_tab[hanum]);
2364 spin_lock_irqsave(&ha->smp_lock, flags);
2371 if ((b != ha->virt_bus && ha->raw[BUS_L2P(ha,b)].lock) ||
2372 (b==ha->virt_bus && t<MAX_HDRIVES && ha->hdr[t].lock)) {
2379 if (ha->req_first==NULL) {
2380 ha->req_first = scp; /* queue was empty */
2383 pscp = ha->req_first;
2393 spin_unlock_irqrestore(&ha->smp_lock, flags);
2397 for (nscp=ha->req_first; nscp; nscp=(Scsi_Cmnd*)nscp->SCp.ptr)
2408 register gdth_ha_str *ha;
2417 ha = HADATA(gdth_ctr_tab[hanum]);
2419 spin_lock_irqsave(&ha->smp_lock, flags);
2421 ha->cmd_cnt = ha->cmd_offs_dpmem = 0;
2426 for (nscp = pscp = ha->req_first; nscp; nscp = (Scsi_Cmnd *)nscp->SCp.ptr) {
2435 if ((b != ha->virt_bus && ha->raw[BUS_L2P(ha,b)].lock) ||
2436 (b == ha->virt_bus && t < MAX_HDRIVES && ha->hdr[t].lock))
2446 spin_unlock_irqrestore(&ha->smp_lock, flags);
2462 if ((ha->scan_mode & 0x0f) == 0) {
2464 ha->scan_mode |= 1;
2465 TRACE2(("Scan mode: 0x%x\n", ha->scan_mode));
2467 } else if ((ha->scan_mode & 0x0f) == 1) {
2471 nscp->SCp.phase = ((ha->scan_mode & 0x10 ? 1:0) << 8)
2473 ha->scan_mode = 0x12;
2475 ha->scan_mode));
2477 ha->scan_mode &= 0x10;
2478 TRACE2(("Scan mode: 0x%x\n", ha->scan_mode));
2480 } else if (ha->scan_mode == 0x12) {
2481 if (b == ha->bus_cnt && t == ha->tid_cnt-1) {
2484 ha->scan_mode &= 0x10;
2486 ha->scan_mode));
2490 if (b == ha->virt_bus && nscp->cmnd[0] != INQUIRY &&
2492 (ha->hdr[t].cluster_type & CLUSTER_DRIVE)) {
2505 if (!(cmd_index=gdth_fill_raw_cmd(hanum,nscp,BUS_L2P(ha,b))))
2522 } else if (b != ha->virt_bus) {
2523 if (ha->raw[BUS_L2P(ha,b)].io_cnt[t] >= GDTH_MAX_RAW ||
2524 !(cmd_index=gdth_fill_raw_cmd(hanum,nscp,BUS_L2P(ha,b))))
2527 ha->raw[BUS_L2P(ha,b)].io_cnt[t]++;
2528 } else if (t >= MAX_HDRIVES || !ha->hdr[t].present || l != 0) {
2549 if (ha->hdr[t].media_changed && nscp->cmnd[0] != INQUIRY) {
2553 ha->hdr[t].media_changed = FALSE;
2570 if ( (nscp->cmnd[4]&1) && !(ha->hdr[t].devtype&1) ) {
2579 nscp->cmnd[3] = (ha->hdr[t].devtype&1) ? 1:0;
2601 if (ha->hdr[t].media_changed) {
2605 ha->hdr[t].media_changed = FALSE;
2635 if (nscp == ha->req_first)
2636 ha->req_first = pscp = (Scsi_Cmnd *)nscp->SCp.ptr;
2643 if (ha->cmd_cnt > 0) {
2648 spin_unlock_irqrestore(&ha->smp_lock, flags);
2650 if (gdth_polling && ha->cmd_cnt > 0) {
2663 gdth_ha_str *ha;
2667 ha = HADATA(gdth_ctr_tab[hanum]);
2709 register gdth_ha_str *ha;
2716 ha = HADATA(gdth_ctr_tab[hanum]);
2733 t,ha->hdr[t].devtype));
2734 inq.type_qual = (ha->hdr[t].devtype&4) ? TYPE_ROM:TYPE_DISK;
2738 if ((ha->hdr[t].devtype & 1) ||
2739 (ha->hdr[t].cluster_type & CLUSTER_DRIVE))
2744 strcpy(inq.vendor,ha->oem_name);
2764 mpd.hd.dev_par = (ha->hdr[t].devtype&2) ? 0x80:0;
2774 if (ha->hdr[t].size > (ulong64)0xffffffff)
2777 rdc.last_block_no = cpu_to_be32(ha->hdr[t].size-1);
2784 (ha->cache_feat & GDT_64BIT)) {
2788 rdc16.last_block_no = cpu_to_be64(ha->hdr[t].size-1);
2811 register gdth_ha_str *ha;
2821 ha = HADATA(gdth_ctr_tab[hanum]);
2822 cmdp = ha->pccb;
2826 if (ha->type==GDT_EISA && ha->cmd_cnt>0)
2829 mode64 = (ha->cache_feat & GDT_64BIT) ? TRUE : FALSE;
2842 if (ha->cmd_cnt == 0)
2864 if (gdth_write_through || ((ha->hdr[hdrive].rw_attribs & 1) &&
2865 (ha->cache_feat & GDT_WR_THROUGH)))
2915 sgcnt = pci_map_sg(ha->pdev,sl,scp->use_sg,scp->SCp.Message);
2923 ha->dma64_cnt++;
2925 ha->dma32_cnt++;
2935 ha->dma32_cnt++;
2954 phys_addr = pci_map_page(ha->pdev,page,offset,
2958 if (ha->cache_feat & SCATTER_GATHER) {
2969 if (ha->cache_feat & SCATTER_GATHER) {
2990 ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.cache64.sg_lst) +
2999 ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.cache.sg_lst) +
3002 if (ha->cmd_len & 3)
3003 ha->cmd_len += (4 - (ha->cmd_len & 3));
3005 if (ha->cmd_cnt > 0) {
3006 if ((ha->cmd_offs_dpmem + ha->cmd_len + DPMEM_COMMAND_OFFSET) >
3007 ha->ic_all_size) {
3009 ha->cmd_tab[cmd_index-2].cmnd = UNUSED_CMND;
3021 register gdth_ha_str *ha;
3031 ha = HADATA(gdth_ctr_tab[hanum]);
3034 cmdp = ha->pccb;
3038 if (ha->type==GDT_EISA && ha->cmd_cnt>0)
3041 mode64 = (ha->raw_feat & GDT_64BIT) ? TRUE : FALSE;
3051 if (ha->cmd_cnt == 0)
3063 ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.raw64.sg_lst);
3069 ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.raw.sg_lst);
3075 sense_paddr = pci_map_page(ha->pdev,page,offset,
3122 sgcnt = pci_map_sg(ha->pdev,sl,scp->use_sg,scp->SCp.Message);
3130 ha->dma64_cnt++;
3132 ha->dma32_cnt++;
3142 ha->dma32_cnt++;
3160 phys_addr = pci_map_page(ha->pdev,page,offset,
3165 if (ha->raw_feat & SCATTER_GATHER) {
3176 if (ha->raw_feat & SCATTER_GATHER) {
3194 ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.raw64.sg_lst) +
3202 ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.raw.sg_lst) +
3207 if (ha->cmd_len & 3)
3208 ha->cmd_len += (4 - (ha->cmd_len & 3));
3210 if (ha->cmd_cnt > 0) {
3211 if ((ha->cmd_offs_dpmem + ha->cmd_len + DPMEM_COMMAND_OFFSET) >
3212 ha->ic_all_size) {
3214 ha->cmd_tab[cmd_index-2].cmnd = UNUSED_CMND;
3226 register gdth_ha_str *ha;
3230 ha = HADATA(gdth_ctr_tab[hanum]);
3231 cmdp= ha->pccb;
3234 if (ha->type==GDT_EISA && ha->cmd_cnt>0)
3247 if (ha->cmd_cnt == 0)
3253 ha->cmd_len =
3257 if (ha->cache_feat & GDT_64BIT)
3258 ha->cmd_len =
3261 ha->cmd_len =
3265 if (ha->raw_feat & GDT_64BIT)
3266 ha->cmd_len =
3269 ha->cmd_len =
3273 if (ha->cmd_len & 3)
3274 ha->cmd_len += (4 - (ha->cmd_len & 3));
3276 if (ha->cmd_cnt > 0) {
3277 if ((ha->cmd_offs_dpmem + ha->cmd_len + DPMEM_COMMAND_OFFSET) >
3278 ha->ic_all_size) {
3280 ha->cmd_tab[cmd_index-2].cmnd = UNUSED_CMND;
3292 static gdth_evt_str *gdth_store_event(gdth_ha_str *ha, ushort source,
3338 static int gdth_read_event(gdth_ha_str *ha, int handle, gdth_evt_str *estr)
3345 spin_lock_irqsave(&ha->smp_lock, flags);
3353 spin_unlock_irqrestore(&ha->smp_lock, flags);
3366 spin_unlock_irqrestore(&ha->smp_lock, flags);
3370 static void gdth_readapp_event(gdth_ha_str *ha,
3379 spin_lock_irqsave(&ha->smp_lock, flags);
3399 spin_unlock_irqrestore(&ha->smp_lock, flags);
3416 register gdth_ha_str *ha;
3452 ha = HADATA(gdth_ctr_tab[hanum]);
3463 pcs = ha->coal_stat;
3476 if (ha->type == GDT_EISA) {
3479 ha->status = inw(ha->bmic + MAILBOXREG+8);
3480 TRACE2(("gdth_interrupt() error %d/%d\n",IStatus,ha->status));
3482 ha->status = S_OK;
3483 ha->info = inl(ha->bmic + MAILBOXREG+12);
3484 ha->service = inw(ha->bmic + MAILBOXREG+10);
3485 ha->info2 = inl(ha->bmic + MAILBOXREG+4);
3487 outb(0xff, ha->bmic + EDOORREG); /* acknowledge interrupt */
3488 outb(0x00, ha->bmic + SEMA1REG); /* reset status semaphore */
3489 } else if (ha->type == GDT_ISA) {
3490 dp2_ptr = ha->brd;
3493 ha->status = gdth_readw(&dp2_ptr->u.ic.Status);
3494 TRACE2(("gdth_interrupt() error %d/%d\n",IStatus,ha->status));
3496 ha->status = S_OK;
3497 ha->info = gdth_readl(&dp2_ptr->u.ic.Info[0]);
3498 ha->service = gdth_readw(&dp2_ptr->u.ic.Service);
3499 ha->info2 = gdth_readl(&dp2_ptr->u.ic.Info[1]);
3504 } else if (ha->type == GDT_PCI) {
3505 dp6_ptr = ha->brd;
3508 ha->status = gdth_readw(&dp6_ptr->u.ic.Status);
3509 TRACE2(("gdth_interrupt() error %d/%d\n",IStatus,ha->status));
3511 ha->status = S_OK;
3512 ha->info = gdth_readl(&dp6_ptr->u.ic.Info[0]);
3513 ha->service = gdth_readw(&dp6_ptr->u.ic.Service);
3514 ha->info2 = gdth_readl(&dp6_ptr->u.ic.Info[1]);
3519 } else if (ha->type == GDT_PCINEW) {
3522 ha->status = inw(PTR2USHORT(&ha->plx->status));
3523 TRACE2(("gdth_interrupt() error %d/%d\n",IStatus,ha->status));
3525 ha->status = S_OK;
3526 ha->info = inl(PTR2USHORT(&ha->plx->info[0]));
3527 ha->service = inw(PTR2USHORT(&ha->plx->service));
3528 ha->info2 = inl(PTR2USHORT(&ha->plx->info[1]));
3530 outb(0xff, PTR2USHORT(&ha->plx->edoor_reg));
3531 outb(0x00, PTR2USHORT(&ha->plx->sema1_reg));
3532 } else if (ha->type == GDT_PCIMPR) {
3533 dp6m_ptr = ha->brd;
3538 ha->status = pcs->ext_status & 0xffff;
3541 ha->status = gdth_readw(&dp6m_ptr->i960r.status);
3542 TRACE2(("gdth_interrupt() error %d/%d\n",IStatus,ha->status));
3544 ha->status = S_OK;
3548 ha->info = pcs->info0;
3549 ha->info2 = pcs->info1;
3550 ha->service = (pcs->ext_status >> 16) & 0xffff;
3554 ha->info = gdth_readl(&dp6m_ptr->i960r.info[0]);
3555 ha->service = gdth_readw(&dp6m_ptr->i960r.service);
3556 ha->info2 = gdth_readl(&dp6m_ptr->i960r.info[1]);
3560 if (ha->service != SCREENSERVICE &&
3561 (ha->fw_vers & 0xff) >= 0x1a) {
3562 ha->dvr.severity = gdth_readb
3563 (&((gdt6m_dpram_str __iomem *)ha->brd)->i960r.severity);
3565 ha->dvr.event_string[i] = gdth_readb
3566 (&((gdt6m_dpram_str __iomem *)ha->brd)->i960r.evt_str[i]);
3567 if (ha->dvr.event_string[i] == 0)
3589 IStatus,ha->status,ha->info));
3607 ha->dvr.size = sizeof(ha->dvr.eu.driver);
3608 ha->dvr.eu.driver.ionode = hanum;
3609 gdth_store_event(ha, ES_DRIVER, 4, &ha->dvr);
3614 scp = ha->cmd_tab[IStatus-2].cmnd;
3615 Service = ha->cmd_tab[IStatus-2].service;
3616 ha->cmd_tab[IStatus-2].cmnd = UNUSED_CMND;
3619 ha->dvr.size = sizeof(ha->dvr.eu.driver);
3620 ha->dvr.eu.driver.ionode = hanum;
3621 ha->dvr.eu.driver.index = IStatus;
3622 gdth_store_event(ha, ES_DRIVER, 1, &ha->dvr);
3663 if (ha->type == GDT_PCIMPR && coalesced) {
3675 register gdth_ha_str *ha;
3680 ha = HADATA(gdth_ctr_tab[hanum]);
3681 cmdp = ha->pccb;
3683 service,ha->status));
3686 msg = ha->pmsg;
3708 cmdp->u.screen.su.msg.msg_addr = ha->msg_phys;
3709 ha->cmd_offs_dpmem = 0;
3710 ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.screen.su.msg.msg_addr)
3712 ha->cmd_cnt = 0;
3742 cmdp->u.screen.su.msg.msg_addr = ha->msg_phys;
3743 ha->cmd_offs_dpmem = 0;
3744 ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.screen.su.msg.msg_addr)
3746 ha->cmd_cnt = 0;
3756 if (scp->SCp.sent_command == -1 && b != ha->virt_bus) {
3757 ha->raw[BUS_L2P(ha,b)].io_cnt[t]--;
3760 if (ha->status == S_BSY) {
3768 pci_unmap_sg(ha->pdev,scp->request_buffer,
3771 pci_unmap_page(ha->pdev,scp->SCp.dma_handle,
3779 pci_unmap_page(ha->pdev,addr,16,PCI_DMA_FROMDEVICE);
3782 if (ha->status == S_OK) {
3784 scp->SCp.Message = ha->info;
3790 ha->hdr[t].cluster_type = (unchar)ha->info;
3791 if (!(ha->hdr[t].cluster_type &
3795 if (ha->hdr[t].cluster_type &
3805 ha->hdr[t].cluster_type |= CLUSTER_MOUNTED;
3806 ha->hdr[t].media_changed = TRUE;
3808 ha->hdr[t].cluster_type &= ~CLUSTER_MOUNTED;
3809 ha->hdr[t].media_changed = TRUE;
3819 ha->hdr[t].cluster_type |= CLUSTER_RESERVED;
3821 ha->hdr[t].cluster_type &= ~CLUSTER_RESERVED;
3827 scp->SCp.Status = ha->status;
3828 scp->SCp.Message = ha->info;
3832 scp->SCp.sent_command, ha->status));
3845 if (ha->status == S_CACHE_UNKNOWN &&
3846 (ha->hdr[t].cluster_type &
3849 ha->hdr[t].cluster_type &= ~CLUSTER_RESERVED;
3852 if (ha->status == (ushort)S_CACHE_RESERV) {
3860 ha->dvr.size = sizeof(ha->dvr.eu.sync);
3861 ha->dvr.eu.sync.ionode = hanum;
3862 ha->dvr.eu.sync.service = service;
3863 ha->dvr.eu.sync.status = ha->status;
3864 ha->dvr.eu.sync.info = ha->info;
3865 ha->dvr.eu.sync.hostdrive = t;
3866 if (ha->status >= 0x8000)
3867 gdth_store_event(ha, ES_SYNC, 0, &ha->dvr);
3869 gdth_store_event(ha, ES_SYNC, service, &ha->dvr);
3873 if (ha->status != S_RAW_SCSI || ha->info >= 0x100) {
3876 scp->result = (DID_OK << 16) | ha->info;
4047 gdth_ha_str *ha;
4051 ha = HADATA(gdth_ctr_tab[hanum]);
4052 cmdp= ha->pccb;
4053 TRACE2(("gdth_async_event() ha %d serv %d\n",
4054 hanum,ha->service));
4056 if (ha->service == SCREENSERVICE) {
4057 if (ha->status == MSG_REQUEST) {
4068 cmdp->u.screen.su.msg.msg_addr = ha->msg_phys;
4069 ha->cmd_offs_dpmem = 0;
4070 ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.screen.su.msg.msg_addr)
4072 ha->cmd_cnt = 0;
4074 if (ha->type == GDT_EISA)
4075 printk("[EISA slot %d] ",(ushort)ha->brd_phys);
4076 else if (ha->type == GDT_ISA)
4077 printk("[DPMEM 0x%4X] ",(ushort)ha->brd_phys);
4079 printk("[PCI %d/%d] ",(ushort)(ha->brd_phys>>8),
4080 (ushort)((ha->brd_phys>>3)&0x1f));
4085 if (ha->type == GDT_PCIMPR &&
4086 (ha->fw_vers & 0xff) >= 0x1a) {
4087 ha->dvr.size = 0;
4088 ha->dvr.eu.async.ionode = hanum;
4089 ha->dvr.eu.async.status = ha->status;
4092 ha->dvr.size = sizeof(ha->dvr.eu.async);
4093 ha->dvr.eu.async.ionode = hanum;
4094 ha->dvr.eu.async.service = ha->service;
4095 ha->dvr.eu.async.status = ha->status;
4096 ha->dvr.eu.async.info = ha->info;
4097 *(ulong32 *)ha->dvr.eu.async.scsi_coord = ha->info2;
4099 gdth_store_event( ha, ES_ASYNC, ha->service, &ha->dvr );
4100 gdth_log_event( &ha->dvr, NULL );
4103 if (ha->service == CACHESERVICE && ha->status == 56) {
4105 (ushort)ha->info));
4106 /* gdth_analyse_hdrive(hanum, (ushort)ha->info); */
4173 gdth_ha_str *ha;
4177 ha = HADATA(gdth_ctr_tab[hanum]);
4178 spin_lock_irqsave(&ha->smp_lock, flags);
4181 if (ha->cmd_tab[i].cmnd != UNUSED_CMND)
4184 for (act_rq=0,nscp=ha->req_first; nscp; nscp=(Scsi_Cmnd*)nscp->SCp.ptr)
4193 spin_unlock_irqrestore(&ha->smp_lock, flags);
4296 gdth_ha_str *ha;
4345 ha = HADATA(shp);
4346 if (!gdth_init_isa(isa_bios,ha)) {
4355 isa_bios,ha->irq,ha->drq);
4357 if (request_irq(ha->irq,gdth_interrupt,IRQF_DISABLED,"gdth",ha)) {
4362 if (request_dma(ha->drq,"gdth")) {
4364 free_irq(ha->irq,ha);
4368 set_dma_mode(ha->drq,DMA_MODE_CASCADE);
4369 enable_dma(ha->drq);
4371 shp->irq = ha->irq;
4372 shp->dma_channel = ha->drq;
4380 ha->pccb = CMDDATA(shp);
4381 ha->ccb_phys = 0L;
4382 ha->pdev = NULL;
4383 ha->pscratch = pci_alloc_consistent(ha->pdev, GDTH_SCRATCH,
4385 ha->scratch_phys = scratch_dma_handle;
4386 ha->pmsg = pci_alloc_consistent(ha->pdev, sizeof(gdth_msg_str),
4388 ha->msg_phys = scratch_dma_handle;
4390 ha->coal_stat = (gdth_coal_status *)
4391 pci_alloc_consistent(ha->pdev, sizeof(gdth_coal_status) *
4393 ha->coal_stat_phys = scratch_dma_handle;
4396 ha->scratch_busy = FALSE;
4397 ha->req_first = NULL;
4398 ha->tid_cnt = MAX_HDRIVES;
4399 if (max_ids > 0 && max_ids < ha->tid_cnt)
4400 ha->tid_cnt = max_ids;
4402 ha->cmd_tab[i].cmnd = UNUSED_CMND;
4403 ha->scan_mode = rescan ? 0x10 : 0;
4405 if (ha->pscratch == NULL || ha->pmsg == NULL ||
4412 if (ha->coal_stat)
4413 pci_free_consistent(ha->pdev, sizeof(gdth_coal_status) *
4414 MAXOFFSETS, ha->coal_stat,
4415 ha->coal_stat_phys);
4417 if (ha->pscratch)
4418 pci_free_consistent(ha->pdev, GDTH_SCRATCH,
4419 ha->pscratch, ha->scratch_phys);
4420 if (ha->pmsg)
4421 pci_free_consistent(ha->pdev, sizeof(gdth_msg_str),
4422 ha->pmsg, ha->msg_phys);
4424 free_irq(ha->irq,ha);
4428 if (hdr_channel < 0 || hdr_channel > ha->bus_cnt)
4429 hdr_channel = ha->bus_cnt;
4430 ha->virt_bus = hdr_channel;
4436 if (ha->cache_feat & ha->raw_feat & ha->screen_feat & GDT_64BIT)
4439 shp->max_id = ha->tid_cnt;
4441 shp->max_channel = virt_ctr ? 0 : ha->bus_cnt;
4445 for (b = 1; b < ha->bus_cnt + 1; ++b) {
4448 shp->irq = ha->irq;
4449 shp->dma_channel = ha->drq;
4456 spin_lock_init(&ha->smp_lock);
4474 ha = HADATA(shp);
4475 if (!gdth_init_eisa(eisa_slot,ha)) {
4481 eisa_slot>>12,ha->irq);
4483 if (request_irq(ha->irq,gdth_interrupt,IRQF_DISABLED,"gdth",ha)) {
4489 shp->irq = ha->irq;
4500 ha->pccb = CMDDATA(shp);
4501 ha->ccb_phys = 0L;
4503 ha->pdev = NULL;
4504 ha->pscratch = pci_alloc_consistent(ha->pdev, GDTH_SCRATCH,
4506 ha->scratch_phys = scratch_dma_handle;
4507 ha->pmsg = pci_alloc_consistent(ha->pdev, sizeof(gdth_msg_str),
4509 ha->msg_phys = scratch_dma_handle;
4511 ha->coal_stat = (gdth_coal_status *)
4512 pci_alloc_consistent(ha->pdev, sizeof(gdth_coal_status) *
4514 ha->coal_stat_phys = scratch_dma_handle;
4516 ha->ccb_phys =
4517 pci_map_single(ha->pdev,ha->pccb,
4519 ha->scratch_busy = FALSE;
4520 ha->req_first = NULL;
4521 ha->tid_cnt = MAX_HDRIVES;
4522 if (max_ids > 0 && max_ids < ha->tid_cnt)
4523 ha->tid_cnt = max_ids;
4525 ha->cmd_tab[i].cmnd = UNUSED_CMND;
4526 ha->scan_mode = rescan ? 0x10 : 0;
4528 if (ha->pscratch == NULL || ha->pmsg == NULL ||
4534 if (ha->coal_stat)
4535 pci_free_consistent(ha->pdev, sizeof(gdth_coal_status) *
4536 MAXOFFSETS, ha->coal_stat,
4537 ha->coal_stat_phys);
4539 if (ha->pscratch)
4540 pci_free_consistent(ha->pdev, GDTH_SCRATCH,
4541 ha->pscratch, ha->scratch_phys);
4542 if (ha->pmsg)
4543 pci_free_consistent(ha->pdev, sizeof(gdth_msg_str),
4544 ha->pmsg, ha->msg_phys);
4545 if (ha->ccb_phys)
4546 pci_unmap_single(ha->pdev,ha->ccb_phys,
4548 free_irq(ha->irq,ha);
4552 if (hdr_channel < 0 || hdr_channel > ha->bus_cnt)
4553 hdr_channel = ha->bus_cnt;
4554 ha->virt_bus = hdr_channel;
4560 if (ha->cache_feat & ha->raw_feat & ha->screen_feat & GDT_64BIT)
4563 shp->max_id = ha->tid_cnt;
4565 shp->max_channel = virt_ctr ? 0 : ha->bus_cnt;
4569 for (b = 1; b < ha->bus_cnt + 1; ++b) {
4572 shp->irq = ha->irq;
4580 spin_lock_init(&ha->smp_lock);
4600 ha = HADATA(shp);
4601 if (!gdth_init_pci(&pcistr[ctr],ha)) {
4607 pcistr[ctr].bus,PCI_SLOT(pcistr[ctr].device_fn),ha->irq);
4609 if (request_irq(ha->irq, gdth_interrupt,
4610 IRQF_DISABLED|IRQF_SHARED, "gdth", ha))
4617 shp->irq = ha->irq;
4626 ha->pccb = CMDDATA(shp);
4627 ha->ccb_phys = 0L;
4629 ha->pscratch = pci_alloc_consistent(ha->pdev, GDTH_SCRATCH,
4631 ha->scratch_phys = scratch_dma_handle;
4632 ha->pmsg = pci_alloc_consistent(ha->pdev, sizeof(gdth_msg_str),
4634 ha->msg_phys = scratch_dma_handle;
4636 ha->coal_stat = (gdth_coal_status *)
4637 pci_alloc_consistent(ha->pdev, sizeof(gdth_coal_status) *
4639 ha->coal_stat_phys = scratch_dma_handle;
4641 ha->scratch_busy = FALSE;
4642 ha->req_first = NULL;
4643 ha->tid_cnt = pcistr[ctr].device_id >= 0x200 ? MAXID : MAX_HDRIVES;
4644 if (max_ids > 0 && max_ids < ha->tid_cnt)
4645 ha->tid_cnt = max_ids;
4647 ha->cmd_tab[i].cmnd = UNUSED_CMND;
4648 ha->scan_mode = rescan ? 0x10 : 0;
4651 if (ha->pscratch == NULL || ha->pmsg == NULL ||
4655 if (hdr_channel < 0 || hdr_channel > ha->bus_cnt)
4656 hdr_channel = ha->bus_cnt;
4657 ha->virt_bus = hdr_channel;
4663 if (!(ha->cache_feat & ha->raw_feat & ha->screen_feat &GDT_64BIT)||
4665 (!ha->dma64_support)) {
4686 if (ha->coal_stat)
4687 pci_free_consistent(ha->pdev, sizeof(gdth_coal_status) *
4688 MAXOFFSETS, ha->coal_stat,
4689 ha->coal_stat_phys);
4691 if (ha->pscratch)
4692 pci_free_consistent(ha->pdev, GDTH_SCRATCH,
4693 ha->pscratch, ha->scratch_phys);
4694 if (ha->pmsg)
4695 pci_free_consistent(ha->pdev, sizeof(gdth_msg_str),
4696 ha->pmsg, ha->msg_phys);
4697 free_irq(ha->irq,ha);
4702 shp->max_id = ha->tid_cnt;
4704 shp->max_channel = virt_ctr ? 0 : ha->bus_cnt;
4708 for (b = 1; b < ha->bus_cnt + 1; ++b) {
4711 shp->irq = ha->irq;
4719 spin_lock_init(&ha->smp_lock);
4744 gdth_ha_str *ha;
4749 ha = HADATA(gdth_ctr_tab[hanum]);
4750 if (ha->sdev) {
4751 scsi_free_host_dev(ha->sdev);
4752 ha->sdev = NULL;
4757 free_irq(shp->irq,ha);
4765 if (ha->coal_stat)
4766 pci_free_consistent(ha->pdev, sizeof(gdth_coal_status) *
4767 MAXOFFSETS, ha->coal_stat, ha->coal_stat_phys);
4769 if (ha->pscratch)
4770 pci_free_consistent(ha->pdev, GDTH_SCRATCH,
4771 ha->pscratch, ha->scratch_phys);
4772 if (ha->pmsg)
4773 pci_free_consistent(ha->pdev, sizeof(gdth_msg_str),
4774 ha->pmsg, ha->msg_phys);
4775 if (ha->ccb_phys)
4776 pci_unmap_single(ha->pdev,ha->ccb_phys,
4798 gdth_ha_str *ha;
4802 ha = HADATA(gdth_ctr_tab[hanum]);
4804 if (ha->type == GDT_EISA) {
4805 switch (ha->stype) {
4813 } else if (ha->type == GDT_ISA) {
4815 } else if (ha->type == GDT_PCI) {
4816 switch (ha->stype) {
4831 gdth_ha_str *ha;
4835 ha = HADATA(gdth_ctr_tab[hanum]);
4837 return ((const char *)ha->binfo.type_string);
4843 gdth_ha_str *ha;
4852 ha = HADATA(gdth_ctr_tab[hanum]);
4855 spin_lock_irqsave(&ha->smp_lock, flags);
4857 cmnd = ha->cmd_tab[i].cmnd;
4859 ha->cmd_tab[i].cmnd = UNUSED_CMND;
4861 spin_unlock_irqrestore(&ha->smp_lock, flags);
4863 if (b == ha->virt_bus) {
4866 if (ha->hdr[i].present) {
4867 spin_lock_irqsave(&ha->smp_lock, flags);
4873 ha->hdr[i].cluster_type &= ~CLUSTER_RESERVED;
4875 spin_unlock_irqrestore(&ha->smp_lock, flags);
4880 spin_lock_irqsave(&ha->smp_lock, flags);
4882 ha->raw[BUS_L2P(ha,b)].io_cnt[i] = 0;
4887 BUS_L2P(ha,b), 0, 0);
4889 spin_unlock_irqrestore(&ha->smp_lock, flags);
4902 gdth_ha_str *ha;
4916 TRACE2(("gdth_bios_param() ha %d bus %d target %d\n", hanum, b, t));
4917 ha = HADATA(gdth_ctr_tab[hanum]);
4919 if (b != ha->virt_bus || ha->hdr[t].heads == 0) {
4924 ip[0] = ha->hdr[t].heads;
4925 ip[1] = ha->hdr[t].secs;
4968 gdth_ha_str *ha;
4972 ha = HADATA(gdth_ctr_tab[i]);
4973 if (!ha->sdev)
4974 ha->sdev = scsi_get_host_dev(gdth_ctr_tab[i]);
4990 gdth_ha_str *ha;
4996 ha = HADATA(gdth_ctr_tab[evt.ionode]);
5007 spin_lock_irqsave(&ha->smp_lock, flags);
5008 gdth_store_event(ha, evt.event.event_source, evt.event.event_idx,
5010 spin_unlock_irqrestore(&ha->smp_lock, flags);
5014 evt.handle = gdth_read_event(ha, evt.handle, &evt.event);
5016 gdth_readapp_event(ha, evt.erase, &evt.event);
5028 gdth_ha_str *ha;
5033 ha = HADATA(gdth_ctr_tab[ldrv.ionode]);
5037 if (j >= MAX_HDRIVES || !ha->hdr[j].present)
5040 spin_lock_irqsave(&ha->smp_lock, flags);
5041 ha->hdr[j].lock = 1;
5042 spin_unlock_irqrestore(&ha->smp_lock, flags);
5043 gdth_wait_completion(ldrv.ionode, ha->bus_cnt, j);
5044 gdth_stop_timeout(ldrv.ionode, ha->bus_cnt, j);
5046 spin_lock_irqsave(&ha->smp_lock, flags);
5047 ha->hdr[j].lock = 0;
5048 spin_unlock_irqrestore(&ha->smp_lock, flags);
5049 gdth_start_timeout(ldrv.ionode, ha->bus_cnt, j);
5061 gdth_ha_str *ha;
5068 ha = HADATA(gdth_ctr_tab[hanum]);
5070 if (!ha->hdr[res.number].present)
5075 if (ha->cache_feat & GDT_64BIT)
5080 rval = __gdth_execute(ha->sdev, &cmd, cmnd, 30, NULL);
5096 gdth_ha_str *ha;
5103 ha = HADATA(gdth_ctr_tab[hanum]);
5117 if (ha->cache_feat & GDT_64BIT) {
5123 if (ha->cache_feat & SCATTER_GATHER) {
5134 if (ha->cache_feat & SCATTER_GATHER) {
5146 if (ha->raw_feat & GDT_64BIT) {
5159 if (ha->raw_feat & SCATTER_GATHER) {
5171 if (ha->raw_feat & SCATTER_GATHER) {
5189 rval = __gdth_execute(ha->sdev, &gen.command, cmnd, gen.timeout, &gen.info);
5212 gdth_ha_str *ha;
5228 ha = HADATA(gdth_ctr_tab[hanum]);
5232 if (!ha->hdr[i].present) {
5236 rsc->hdr_list[i].bus = ha->virt_bus;
5239 rsc->hdr_list[i].cluster_type = ha->hdr[i].cluster_type;
5240 if (ha->hdr[i].cluster_type & CLUSTER_DRIVE) {
5243 if (ha->cache_feat & GDT_64BIT)
5247 if (__gdth_execute(ha->sdev, cmd, cmnd, 30, &cluster_type) == S_OK)
5272 gdth_ha_str *ha;
5285 ha = HADATA(gdth_ctr_tab[hanum]);
5291 if (ha->cache_feat & GDT_64BIT) {
5299 status = __gdth_execute(ha->sdev, cmd, cmnd, 30, &info);
5310 if (ha->cache_feat & GDT_64BIT)
5315 status = __gdth_execute(ha->sdev, cmd, cmnd, 30, &info);
5317 spin_lock_irqsave(&ha->smp_lock, flags);
5318 rsc->hdr_list[i].bus = ha->virt_bus;
5322 ha->hdr[i].present = FALSE;
5324 ha->hdr[i].present = TRUE;
5325 ha->hdr[i].size = info;
5327 ha->hdr[i].size &= ~SECS32;
5328 gdth_eval_mapping(ha->hdr[i].size,&cyls,&hds,&secs);
5329 ha->hdr[i].heads = hds;
5330 ha->hdr[i].secs = secs;
5332 ha->hdr[i].size = cyls * hds * secs;
5334 spin_unlock_irqrestore(&ha->smp_lock, flags);
5339 /* but we need ha->info2, not yet stored in scp->SCp */
5344 if (ha->cache_feat & GDT_64BIT)
5349 status = __gdth_execute(ha->sdev, cmd, cmnd, 30, &info);
5351 spin_lock_irqsave(&ha->smp_lock, flags);
5352 ha->hdr[i].devtype = (status == S_OK ? (ushort)info : 0);
5353 spin_unlock_irqrestore(&ha->smp_lock, flags);
5357 if (ha->cache_feat & GDT_64BIT)
5362 status = __gdth_execute(ha->sdev, cmd, cmnd, 30, &info);
5364 spin_lock_irqsave(&ha->smp_lock, flags);
5365 ha->hdr[i].cluster_type =
5367 spin_unlock_irqrestore(&ha->smp_lock, flags);
5368 rsc->hdr_list[i].cluster_type = ha->hdr[i].cluster_type;
5372 if (ha->cache_feat & GDT_64BIT)
5377 status = __gdth_execute(ha->sdev, cmd, cmnd, 30, &info);
5379 spin_lock_irqsave(&ha->smp_lock, flags);
5380 ha->hdr[i].rw_attribs = (status == S_OK ? (ushort)info : 0);
5381 spin_unlock_irqrestore(&ha->smp_lock, flags);
5398 gdth_ha_str *ha;
5444 ha = HADATA(gdth_ctr_tab[ctrt.ionode]);
5445 if (ha->type == GDT_ISA || ha->type == GDT_EISA) {
5446 ctrt.type = (unchar)((ha->stype>>20) - 0x10);
5448 if (ha->type != GDT_PCIMPR) {
5449 ctrt.type = (unchar)((ha->stype<<4) + 6);
5452 (ha->oem_id == OEM_ID_INTEL ? 0xfd : 0xfe);
5453 if (ha->stype >= 0x300)
5454 ctrt.ext_type = 0x6000 | ha->subdevice_id;
5456 ctrt.ext_type = 0x6000 | ha->stype;
5458 ctrt.device_id = ha->stype;
5459 ctrt.sub_device_id = ha->subdevice_id;
5461 ctrt.info = ha->brd_phys;
5462 ctrt.oem_id = ha->oem_id;
5485 ha = HADATA(gdth_ctr_tab[lchn.ionode]);
5488 if (i < ha->bus_cnt) {
5490 spin_lock_irqsave(&ha->smp_lock, flags);
5491 ha->raw[i].lock = 1;
5492 spin_unlock_irqrestore(&ha->smp_lock, flags);
5493 for (j = 0; j < ha->tid_cnt; ++j) {
5498 spin_lock_irqsave(&ha->smp_lock, flags);
5499 ha->raw[i].lock = 0;
5500 spin_unlock_irqrestore(&ha->smp_lock, flags);
5501 for (j = 0; j < ha->tid_cnt; ++j) {
5525 ha = HADATA(gdth_ctr_tab[hanum]);
5532 scp->device = ha->sdev;
5540 scp = scsi_allocate_device(ha->sdev, 1, FALSE);
5569 gdth_ha_str *ha;
5575 ha = HADATA(gdth_ctr_tab[hanum]);
5578 if (ha->hdr[i].present) {
5582 if (ha->cache_feat & GDT_64BIT) {
5591 TRACE2(("gdth_flush(): flush ha %d drive %d\n", hanum, i));