Lines Matching refs:TARGET_COMMAND_REG
534 NCR5380_write(TARGET_COMMAND_REG, 0);
814 NCR5380_write(TARGET_COMMAND_REG, 0);
1248 NCR5380_write(TARGET_COMMAND_REG, 0);
1494 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(p));
1610 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(NCR5380_read(STATUS_REG) & PHASE_MASK));
1645 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(tmp));
1720 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(p));
1858 if (NCR5380_read(TARGET_COMMAND_REG) & TCR_LAST_BYTE_SENT) {
1865 while (!(NCR5380_read(TARGET_COMMAND_REG) & TCR_LAST_BYTE_SENT));
1922 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(tmp));
2115 NCR5380_write(TARGET_COMMAND_REG, 0);
2147 NCR5380_write(TARGET_COMMAND_REG, 0);