Lines Matching defs:p_slot
85 struct slot *p_slot;
166 extern int shpchp_configure_device(struct slot *p_slot);
167 extern int shpchp_unconfigure_device(struct slot *p_slot);
241 static inline void amd_pogo_errata_save_misc_reg(struct slot *p_slot)
246 pci_read_config_dword(p_slot->ctrl->pci_dev, PCIX_MISCII_OFFSET, &pcix_misc2_temp);
248 p_slot->ctrl->pcix_misc2_reg = pcix_misc2_temp;
256 pci_write_config_dword(p_slot->ctrl->pci_dev, PCIX_MISCII_OFFSET, pcix_misc2_temp);
259 static inline void amd_pogo_errata_restore_misc_reg(struct slot *p_slot)
268 pci_read_config_dword(p_slot->ctrl->pci_dev, PCIX_MISC_BRIDGE_ERRORS_OFFSET, &pcix_bridge_errors_reg);
273 pci_write_config_dword(p_slot->ctrl->pci_dev, PCIX_MISC_BRIDGE_ERRORS_OFFSET, perr_set);
277 pci_read_config_dword(p_slot->ctrl->pci_dev, PCIX_MEM_BASE_LIMIT_OFFSET, &pcix_mem_base_reg);
282 pci_write_config_dword(p_slot->ctrl->pci_dev, PCIX_MEM_BASE_LIMIT_OFFSET, rse_set);
285 pci_read_config_dword( p_slot->ctrl->pci_dev, PCIX_MISCII_OFFSET, &pcix_misc2_temp );
287 if (p_slot->ctrl->pcix_misc2_reg & SERRFATALENABLE_MASK)
292 if (p_slot->ctrl->pcix_misc2_reg & SERRNONFATALENABLE_MASK)
297 if (p_slot->ctrl->pcix_misc2_reg & PERRFLOODENABLE_MASK)
302 if (p_slot->ctrl->pcix_misc2_reg & PERRFATALENABLE_MASK)
307 if (p_slot->ctrl->pcix_misc2_reg & PERRNONFATALENABLE_MASK)
311 pci_write_config_dword(p_slot->ctrl->pci_dev, PCIX_MISCII_OFFSET, pcix_misc2_temp);