Lines Matching refs:ipw_write_reg32
297 static inline void ipw_write_reg32(struct ipw_priv *a, u32 b, u32 c)
851 ipw_write_reg32(priv, IPW_EVENT_REG, led);
892 ipw_write_reg32(priv, IPW_EVENT_REG, led);
936 ipw_write_reg32(priv, IPW_EVENT_REG, led);
971 ipw_write_reg32(priv, IPW_EVENT_REG, led);
1020 ipw_write_reg32(priv, IPW_EVENT_REG, led);
1043 ipw_write_reg32(priv, IPW_EVENT_REG, led);
1587 ipw_write_reg32(p, IPW_INTERNAL_CMD_EVENT, reg);
1611 ipw_write_reg32(p, 0x301100, reg);
2539 ipw_write_reg32(p, FW_MEM_REG_EEPROM_ACCESS, data);
2690 ipw_write_reg32(priv, IPW_DMA_I_CB_BASE, IPW_SHARED_SRAM_DMA_CONTROL);
2704 ipw_write_reg32(priv, IPW_DMA_I_DMA_CONTROL, control);
2744 ipw_write_reg32(priv, IPW_DMA_I_DMA_CONTROL, control);
3047 ipw_write_reg32(priv, IPW_MEM_HALT_AND_RESET, IPW_BIT_HALT_RESET_ON);
3049 ipw_write_reg32(priv, IPW_MEM_HALT_AND_RESET, IPW_BIT_HALT_RESET_OFF);
3053 ipw_write_reg32(priv, IPW_INTERNAL_CMD_EVENT, IPW_BASEBAND_POWER_DOWN);
3056 ipw_write_reg32(priv, IPW_INTERNAL_CMD_EVENT, 0);
6098 ipw_write_reg32(priv, reg, *(u32 *) & fr);