Lines Matching refs:mac
66 #define TX_DESC(mac, num) ((mac)->tx->desc[(num) & (TX_RING_SIZE-1)])
67 #define TX_DESC_INFO(mac, num) ((mac)->tx->desc_info[(num) & (TX_RING_SIZE-1)])
68 #define RX_DESC(mac, num) ((mac)->rx->desc[(num) & (RX_RING_SIZE-1)])
69 #define RX_DESC_INFO(mac, num) ((mac)->rx->desc_info[(num) & (RX_RING_SIZE-1)])
70 #define RX_BUFF(mac, num) ((mac)->rx->buffers[(num) & (RX_RING_SIZE-1)])
84 static int pasemi_get_mac_addr(struct pasemi_mac *mac)
86 struct pci_dev *pdev = mac->pdev;
94 "No device node for mac, not configuring\n");
98 maddr = of_get_property(dn, "local-mac-address", &len);
101 memcpy(mac->mac_addr, maddr, 6);
105 /* Some old versions of firmware mistakenly uses mac-address
106 * (and as a string) instead of a byte array in local-mac-address.
110 maddr = of_get_property(dn, "mac-address", NULL);
114 "no mac address in device tree, not configuring\n");
122 "can't parse mac address, not configuring\n");
126 memcpy(mac->mac_addr, addr, 6);
134 struct pasemi_mac *mac = netdev_priv(dev);
135 int chan_id = mac->dma_rxch;
151 ring->desc = dma_alloc_coherent(&mac->dma_pdev->dev,
161 ring->buffers = dma_alloc_coherent(&mac->dma_pdev->dev,
169 pci_write_config_dword(mac->dma_pdev, PAS_DMA_RXCHAN_BASEL(chan_id),
172 pci_write_config_dword(mac->dma_pdev, PAS_DMA_RXCHAN_BASEU(chan_id),
176 pci_write_config_dword(mac->dma_pdev, PAS_DMA_RXCHAN_CFG(chan_id),
179 pci_write_config_dword(mac->dma_pdev, PAS_DMA_RXINT_BASEL(mac->dma_if),
182 pci_write_config_dword(mac->dma_pdev, PAS_DMA_RXINT_BASEU(mac->dma_if),
191 mac->rx = ring;
196 dma_free_coherent(&mac->dma_pdev->dev,
198 mac->rx->desc, mac->rx->dma);
210 struct pasemi_mac *mac = netdev_priv(dev);
212 int chan_id = mac->dma_txch;
227 ring->desc = dma_alloc_coherent(&mac->dma_pdev->dev,
236 pci_write_config_dword(mac->dma_pdev, PAS_DMA_TXCHAN_BASEL(chan_id),
241 pci_write_config_dword(mac->dma_pdev, PAS_DMA_TXCHAN_BASEU(chan_id), val);
243 pci_write_config_dword(mac->dma_pdev, PAS_DMA_TXCHAN_CFG(chan_id),
245 PAS_DMA_TXCHAN_CFG_TATTR(mac->dma_if) |
254 mac->tx = ring;
268 struct pasemi_mac *mac = netdev_priv(dev);
274 info = &TX_DESC_INFO(mac, i);
275 dp = &TX_DESC(mac, i);
278 pci_unmap_single(mac->dma_pdev,
291 dma_free_coherent(&mac->dma_pdev->dev,
293 mac->tx->desc, mac->tx->dma);
295 kfree(mac->tx->desc_info);
296 kfree(mac->tx);
297 mac->tx = NULL;
302 struct pasemi_mac *mac = netdev_priv(dev);
308 info = &RX_DESC_INFO(mac, i);
309 dp = &RX_DESC(mac, i);
312 pci_unmap_single(mac->dma_pdev,
325 dma_free_coherent(&mac->dma_pdev->dev,
327 mac->rx->desc, mac->rx->dma);
329 dma_free_coherent(&mac->dma_pdev->dev, RX_RING_SIZE * sizeof(u64),
330 mac->rx->buffers, mac->rx->buf_dma);
332 kfree(mac->rx->desc_info);
333 kfree(mac->rx);
334 mac->rx = NULL;
339 struct pasemi_mac *mac = netdev_priv(dev);
341 int start = mac->rx->next_to_fill;
344 limit = (mac->rx->next_to_clean + RX_RING_SIZE -
345 mac->rx->next_to_fill) & (RX_RING_SIZE - 1);
348 if (unlikely(mac->rx->next_to_clean == 0 && mac->rx->next_to_fill == 0))
356 struct pasemi_mac_buffer *info = &RX_DESC_INFO(mac, i);
357 u64 *buff = &RX_BUFF(mac, i);
370 dma = pci_map_single(mac->dma_pdev, skb->data, skb->len,
386 pci_write_config_dword(mac->dma_pdev,
387 PAS_DMA_RXCHAN_INCR(mac->dma_rxch),
389 pci_write_config_dword(mac->dma_pdev,
390 PAS_DMA_RXINT_INCR(mac->dma_if),
393 mac->rx->next_to_fill += limit - count;
396 static void pasemi_mac_restart_rx_intr(struct pasemi_mac *mac)
403 pcnt = *mac->rx_status & PAS_STATUS_PCNT_M;
407 pci_write_config_dword(mac->iob_pdev,
408 PAS_IOB_DMA_RXCH_RESET(mac->dma_rxch),
412 static void pasemi_mac_restart_tx_intr(struct pasemi_mac *mac)
417 pcnt = *mac->tx_status & PAS_STATUS_PCNT_M;
421 pci_write_config_dword(mac->iob_pdev,
422 PAS_IOB_DMA_TXCH_RESET(mac->dma_txch), reg);
426 static int pasemi_mac_clean_rx(struct pasemi_mac *mac, int limit)
437 spin_lock(&mac->rx->lock);
439 n = mac->rx->next_to_clean;
445 dp = &RX_DESC(mac, n);
463 info = &RX_DESC_INFO(mac, i);
471 pci_unmap_single(mac->dma_pdev, dma, skb->len,
478 netdev_alloc_skb(mac->netdev, len + NET_IP_ALIGN);
493 skb->protocol = eth_type_trans(skb, mac->netdev);
502 mac->stats.rx_bytes += len;
503 mac->stats.rx_packets++;
513 mac->rx->next_to_clean += limit - count;
514 pasemi_mac_replenish_rx_ring(mac->netdev);
516 spin_unlock(&mac->rx->lock);
521 static int pasemi_mac_clean_tx(struct pasemi_mac *mac)
529 spin_lock_irqsave(&mac->tx->lock, flags);
531 start = mac->tx->next_to_clean;
534 for (i = start; i < mac->tx->next_to_use; i++) {
535 dp = &TX_DESC(mac, i);
541 info = &TX_DESC_INFO(mac, i);
543 pci_unmap_single(mac->dma_pdev, info->dma,
552 mac->tx->next_to_clean += count;
553 spin_unlock_irqrestore(&mac->tx->lock, flags);
555 netif_wake_queue(mac->netdev);
564 struct pasemi_mac *mac = netdev_priv(dev);
567 if (!(*mac->rx_status & PAS_STATUS_CAUSE_M))
570 if (*mac->rx_status & PAS_STATUS_ERROR)
577 pci_read_config_dword(mac->dma_pdev, PAS_DMA_RXINT_RCMDSTA(mac->dma_if), ®);
580 if (*mac->rx_status & PAS_STATUS_SOFT)
582 if (*mac->rx_status & PAS_STATUS_ERROR)
584 if (*mac->rx_status & PAS_STATUS_TIMER)
589 pci_write_config_dword(mac->iob_pdev,
590 PAS_IOB_DMA_RXCH_RESET(mac->dma_rxch), reg);
599 struct pasemi_mac *mac = netdev_priv(dev);
602 if (!(*mac->tx_status & PAS_STATUS_CAUSE_M))
605 pasemi_mac_clean_tx(mac);
607 pcnt = *mac->tx_status & PAS_STATUS_PCNT_M;
611 if (*mac->tx_status & PAS_STATUS_SOFT)
613 if (*mac->tx_status & PAS_STATUS_ERROR)
616 pci_write_config_dword(mac->iob_pdev,
617 PAS_IOB_DMA_TXCH_RESET(mac->dma_txch),
625 struct pasemi_mac *mac = netdev_priv(dev);
630 if (!mac->phydev->link) {
634 if (mac->link && netif_msg_link(mac))
638 mac->link = 0;
644 pci_read_config_dword(mac->pdev, PAS_MAC_CFG_PCFG, &flags);
648 if (!mac->phydev->duplex)
651 switch (mac->phydev->speed) {
665 printk("Unsupported speed %d\n", mac->phydev->speed);
669 msg = mac->link != mac->phydev->link || flags != new_flags;
671 mac->duplex = mac->phydev->duplex;
672 mac->speed = mac->phydev->speed;
673 mac->link = mac->phydev->link;
676 pci_write_config_dword(mac->pdev, PAS_MAC_CFG_PCFG, new_flags);
678 if (msg && netif_msg_link(mac))
680 dev->name, mac->speed, mac->duplex ? "full" : "half");
685 struct pasemi_mac *mac = netdev_priv(dev);
694 dn = pci_device_to_OF_node(mac->pdev);
706 snprintf(mac->phy_id, BUS_ID_SIZE, PHY_ID_FMT, (int)r.start, phy_id);
710 mac->link = 0;
711 mac->speed = 0;
712 mac->duplex = -1;
714 phydev = phy_connect(dev, mac->phy_id, &pasemi_adjust_link, 0, PHY_INTERFACE_MODE_SGMII);
721 mac->phydev = phydev;
733 struct pasemi_mac *mac = netdev_priv(dev);
739 pci_write_config_dword(mac->dma_pdev, PAS_DMA_COM_RXCMD,
743 pci_write_config_dword(mac->dma_pdev, PAS_DMA_COM_TXCMD,
750 pci_write_config_dword(mac->pdev, PAS_MAC_CFG_TXP, flags);
757 pci_write_config_dword(mac->iob_pdev, PAS_IOB_DMA_RXCH_CFG(mac->dma_rxch),
760 pci_write_config_dword(mac->iob_pdev, PAS_IOB_DMA_TXCH_CFG(mac->dma_txch),
764 pasemi_mac_restart_rx_intr(mac);
765 pasemi_mac_restart_tx_intr(mac);
768 pci_write_config_dword(mac->iob_pdev, PAS_IOB_DMA_COM_TIMEOUTCFG,
771 pci_write_config_dword(mac->pdev, PAS_MAC_CFG_PCFG, flags);
781 pci_write_config_dword(mac->pdev, PAS_MAC_IPC_CHNL,
782 PAS_MAC_IPC_CHNL_DCHNO(mac->dma_rxch) |
783 PAS_MAC_IPC_CHNL_BCH(mac->dma_rxch));
786 pci_write_config_dword(mac->dma_pdev,
787 PAS_DMA_RXINT_RCMDSTA(mac->dma_if),
791 pci_write_config_dword(mac->dma_pdev,
792 PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch),
797 pci_write_config_dword(mac->dma_pdev,
798 PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch),
808 dev_warn(&mac->pdev->dev, "phy init failed: %d\n", ret);
819 base_irq = virq_to_hw(mac->dma_pdev->irq);
821 mac->tx_irq = irq_create_mapping(NULL, base_irq + mac->dma_txch);
822 mac->rx_irq = irq_create_mapping(NULL, base_irq + 20 + mac->dma_txch);
824 ret = request_irq(mac->tx_irq, &pasemi_mac_tx_intr, IRQF_DISABLED,
825 mac->tx->irq_name, dev);
827 dev_err(&mac->pdev->dev, "request_irq of irq %d failed: %d\n",
828 base_irq + mac->dma_txch, ret);
832 ret = request_irq(mac->rx_irq, &pasemi_mac_rx_intr, IRQF_DISABLED,
833 mac->rx->irq_name, dev);
835 dev_err(&mac->pdev->dev, "request_irq of irq %d failed: %d\n",
836 base_irq + 20 + mac->dma_rxch, ret);
840 if (mac->phydev)
841 phy_start(mac->phydev);
846 free_irq(mac->tx_irq, dev);
862 struct pasemi_mac *mac = netdev_priv(dev);
866 if (mac->phydev) {
867 phy_stop(mac->phydev);
868 phy_disconnect(mac->phydev);
874 pasemi_mac_clean_tx(mac);
875 pasemi_mac_clean_rx(mac, RX_RING_SIZE);
878 pci_write_config_dword(mac->dma_pdev,
879 PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch),
881 pci_write_config_dword(mac->dma_pdev,
882 PAS_DMA_RXINT_RCMDSTA(mac->dma_if),
884 pci_write_config_dword(mac->dma_pdev,
885 PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch),
889 pci_read_config_dword(mac->dma_pdev,
890 PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch),
898 dev_err(&mac->dma_pdev->dev, "Failed to stop tx channel\n");
901 pci_read_config_dword(mac->dma_pdev,
902 PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch),
910 dev_err(&mac->dma_pdev->dev, "Failed to stop rx channel\n");
913 pci_read_config_dword(mac->dma_pdev,
914 PAS_DMA_RXINT_RCMDSTA(mac->dma_if),
922 dev_err(&mac->dma_pdev->dev, "Failed to stop rx interface\n");
928 pci_write_config_dword(mac->dma_pdev,
929 PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch), 0);
930 pci_write_config_dword(mac->dma_pdev,
931 PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch), 0);
932 pci_write_config_dword(mac->dma_pdev,
933 PAS_DMA_RXINT_RCMDSTA(mac->dma_if), 0);
935 free_irq(mac->tx_irq, dev);
936 free_irq(mac->rx_irq, dev);
947 struct pasemi_mac *mac = netdev_priv(dev);
974 map = pci_map_single(mac->dma_pdev, skb->data, skb->len, PCI_DMA_TODEVICE);
979 txring = mac->tx;
985 pasemi_mac_clean_tx(mac);
986 pasemi_mac_restart_tx_intr(mac);
1000 dp = &TX_DESC(mac, txring->next_to_use);
1001 info = &TX_DESC_INFO(mac, txring->next_to_use);
1009 mac->stats.tx_packets++;
1010 mac->stats.tx_bytes += skb->len;
1014 pci_write_config_dword(mac->dma_pdev,
1015 PAS_DMA_TXCHAN_INCR(mac->dma_txch), 1);
1021 pci_unmap_single(mac->dma_pdev, map, skb->len, PCI_DMA_TODEVICE);
1027 struct pasemi_mac *mac = netdev_priv(dev);
1029 return &mac->stats;
1035 struct pasemi_mac *mac = netdev_priv(dev);
1038 pci_read_config_dword(mac->pdev, PAS_MAC_CFG_PCFG, &flags);
1046 pci_write_config_dword(mac->pdev, PAS_MAC_CFG_PCFG, flags);
1053 struct pasemi_mac *mac = netdev_priv(dev);
1055 pkts = pasemi_mac_clean_rx(mac, limit);
1064 pasemi_mac_restart_rx_intr(mac);
1077 struct pasemi_mac *mac;
1096 mac = netdev_priv(dev);
1098 mac->pdev = pdev;
1099 mac->netdev = dev;
1100 mac->dma_pdev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa007, NULL);
1102 if (!mac->dma_pdev) {
1108 mac->iob_pdev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa001, NULL);
1110 if (!mac->iob_pdev) {
1117 mac->dma_txch = index;
1118 mac->dma_rxch = index;
1124 mac->dma_if = index + 2;
1126 mac->dma_if = index - 4;
1131 mac->type = MAC_TYPE_GMAC;
1134 mac->type = MAC_TYPE_XAUI;
1141 /* get mac addr from device tree */
1142 if (pasemi_get_mac_addr(mac) || !is_valid_ether_addr(mac->mac_addr)) {
1146 memcpy(dev->dev_addr, mac->mac_addr, sizeof(mac->mac_addr));
1164 mac->rx_status = &dma_status->rx_sta[mac->dma_rxch];
1165 mac->tx_status = &dma_status->tx_sta[mac->dma_txch];
1167 mac->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
1170 mac->msg_enable = (NETIF_MSG_IFUP << 1 ) - 1;
1175 dev_err(&mac->pdev->dev, "register_netdev failed with error %d\n",
1181 dev->name, mac->type == MAC_TYPE_GMAC ? "GMAC" : "XAUI",
1182 mac->dma_if, mac->dma_txch, mac->dma_rxch,
1189 pci_dev_put(mac->iob_pdev);
1191 pci_dev_put(mac->dma_pdev);
1203 struct pasemi_mac *mac;
1208 mac = netdev_priv(netdev);
1213 pci_dev_put(mac->dma_pdev);
1214 pci_dev_put(mac->iob_pdev);