Lines Matching defs:fecp
309 volatile fec_t *fecp;
314 fecp = (volatile fec_t*)dev->base_addr;
382 fecp->fec_x_des_active = 0;
455 volatile fec_t *fecp;
459 fecp = (volatile fec_t*)dev->base_addr;
463 while ((int_events = fecp->fec_ievent) != 0) {
464 fecp->fec_ievent = int_events;
573 volatile fec_t *fecp;
585 fecp = (volatile fec_t*)dev->base_addr;
676 fecp->fec_r_des_active = 0;
1264 volatile fec_t *fecp;
1266 fecp = fep->hwp;
1267 fecp->fec_r_cntrl = OPT_FRAME_SIZE | 0x04;
1268 fecp->fec_x_cntrl = 0x00;
1275 fecp->fec_mii_speed = fep->phy_speed;
1283 volatile fec_t *fecp;
1286 fecp = fep->hwp;
1301 *((unsigned long *) &tmpaddr[0]) = fecp->fec_addr_low;
1302 *((unsigned short *) &tmpaddr[4]) = (fecp->fec_addr_high >> 16);
1420 volatile fec_t *fecp;
1422 fecp = fep->hwp;
1423 fecp->fec_r_cntrl = OPT_FRAME_SIZE | 0x04;
1424 fecp->fec_x_cntrl = 0x00;
1431 fecp->fec_mii_speed = fep->phy_speed;
1439 volatile fec_t *fecp;
1442 fecp = fep->hwp;
1457 *((unsigned long *) &tmpaddr[0]) = fecp->fec_addr_low;
1458 *((unsigned short *) &tmpaddr[4]) = (fecp->fec_addr_high >> 16);
1551 volatile fec_t *fecp;
1553 fecp = fep->hwp;
1554 fecp->fec_r_cntrl = OPT_FRAME_SIZE | 0x04;
1555 fecp->fec_x_cntrl = 0x00;
1562 fecp->fec_mii_speed = fep->phy_speed;
1570 volatile fec_t *fecp;
1573 fecp = fep->hwp;
1588 *((unsigned long *) &tmpaddr[0]) = fecp->fec_addr_low;
1589 *((unsigned short *) &tmpaddr[4]) = (fecp->fec_addr_high >> 16);
1701 volatile fec_t *fecp;
1703 fecp = fep->hwp;
1704 fecp->fec_r_cntrl = OPT_FRAME_SIZE | 0x04;
1705 fecp->fec_x_cntrl = 0x00;
1711 fecp->fec_mii_speed = fep->phy_speed;
1719 volatile fec_t *fecp;
1722 fecp = fep->hwp;
1737 *((unsigned long *) &tmpaddr[0]) = fecp->fec_addr_low;
1738 *((unsigned short *) &tmpaddr[4]) = (fecp->fec_addr_high >> 16);
1830 volatile fec_t *fecp;
1832 fecp = fep->hwp;
1848 fecp->fec_mii_speed = fep->phy_speed =
1854 volatile fec_t *fecp;
1856 fecp = fep->hwp;
1860 fecp->fec_ivec = (FEC_INTERRUPT/2) << 29;
1873 volatile fec_t *fecp;
1875 fecp = fep->hwp;
1876 fecp->fec_r_hash = PKT_MAXBUF_SIZE;
1879 fecp->fec_fun_code = 0x78000000;
2068 volatile fec_t *fecp;
2072 fecp = fep->hwp;
2091 fecp->fec_mii_speed = fep->phy_speed = 0;
2269 volatile fec_t *fecp;
2271 fecp = ((struct fec_enet_private *)netdev_priv(dev))->hwp;
2274 fecp->fec_addr_low = dev->dev_addr[3] | (dev->dev_addr[2] << 8) |
2276 fecp->fec_addr_high = (dev->dev_addr[5] << 16) |
2289 volatile fec_t *fecp;
2307 fecp = (volatile fec_t *) fec_hw[index];
2310 fep->hwp = fecp;
2314 fecp->fec_ecntrl = 1;
2392 fecp->fec_r_des_start = __pa((uint)(fep->rx_bd_base));
2393 fecp->fec_x_des_start = __pa((uint)(fep->tx_bd_base));
2400 fecp->fec_hash_table_high = 0;
2401 fecp->fec_hash_table_low = 0;
2402 fecp->fec_r_buff_size = PKT_MAXBLR_SIZE;
2403 fecp->fec_ecntrl = 2;
2404 fecp->fec_r_des_active = 0;
2406 dev->base_addr = (unsigned long)fecp;
2425 fecp->fec_ievent = 0xffc00000;
2426 fecp->fec_imask = (FEC_ENET_TXF | FEC_ENET_TXB |
2449 volatile fec_t *fecp;
2453 fecp = fep->hwp;
2457 fecp->fec_ecntrl = 1;
2462 fecp->fec_ievent = 0xffc00000;
2471 fecp->fec_hash_table_high = 0;
2472 fecp->fec_hash_table_low = 0;
2476 fecp->fec_r_buff_size = PKT_MAXBLR_SIZE;
2482 fecp->fec_r_des_start = __pa((uint)(fep->rx_bd_base));
2483 fecp->fec_x_des_start = __pa((uint)(fep->tx_bd_base));
2534 fecp->fec_r_cntrl = OPT_FRAME_SIZE | 0x04;/* MII enable */
2535 fecp->fec_x_cntrl = 0x04; /* FD enable */
2539 fecp->fec_r_cntrl = OPT_FRAME_SIZE | 0x06;
2540 fecp->fec_x_cntrl = 0x00;
2546 fecp->fec_mii_speed = fep->phy_speed;
2550 fecp->fec_ecntrl = 2;
2551 fecp->fec_r_des_active = 0;
2555 fecp->fec_imask = (FEC_ENET_TXF | FEC_ENET_TXB |
2562 volatile fec_t *fecp;
2566 fecp = fep->hwp;
2573 fecp->fec_x_cntrl = 0x01; /* Graceful transmit stop */
2575 if (!(fecp->fec_ievent & FEC_ENET_GRA))
2581 fecp->fec_ecntrl = 1;
2586 fecp->fec_ievent = FEC_ENET_MII;
2589 fecp->fec_imask = FEC_ENET_MII;
2590 fecp->fec_mii_speed = fep->phy_speed;