Lines Matching refs:E1000_WRITE_REG
743 E1000_WRITE_REG(&adapter->hw, R, (test[pat] & W)); \
759 E1000_WRITE_REG(&adapter->hw, R, W & M); \
797 E1000_WRITE_REG(&adapter->hw, STATUS, toggle);
806 E1000_WRITE_REG(&adapter->hw, STATUS, before);
924 E1000_WRITE_REG(&adapter->hw, IMC, 0xFFFFFFFF);
944 E1000_WRITE_REG(&adapter->hw, IMC, mask);
945 E1000_WRITE_REG(&adapter->hw, ICS, mask);
961 E1000_WRITE_REG(&adapter->hw, IMS, mask);
962 E1000_WRITE_REG(&adapter->hw, ICS, mask);
978 E1000_WRITE_REG(&adapter->hw, IMC, ~mask & 0x00007FFF);
979 E1000_WRITE_REG(&adapter->hw, ICS, ~mask & 0x00007FFF);
990 E1000_WRITE_REG(&adapter->hw, IMC, 0xFFFFFFFF);
1077 E1000_WRITE_REG(&adapter->hw, TDBAL,
1079 E1000_WRITE_REG(&adapter->hw, TDBAH, ((uint64_t) txdr->dma >> 32));
1080 E1000_WRITE_REG(&adapter->hw, TDLEN,
1082 E1000_WRITE_REG(&adapter->hw, TDH, 0);
1083 E1000_WRITE_REG(&adapter->hw, TDT, 0);
1084 E1000_WRITE_REG(&adapter->hw, TCTL,
1133 E1000_WRITE_REG(&adapter->hw, RCTL, rctl & ~E1000_RCTL_EN);
1134 E1000_WRITE_REG(&adapter->hw, RDBAL,
1136 E1000_WRITE_REG(&adapter->hw, RDBAH, ((uint64_t) rxdr->dma >> 32));
1137 E1000_WRITE_REG(&adapter->hw, RDLEN, rxdr->size);
1138 E1000_WRITE_REG(&adapter->hw, RDH, 0);
1139 E1000_WRITE_REG(&adapter->hw, RDT, 0);
1143 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1220 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl_reg);
1329 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl_reg);
1413 E1000_WRITE_REG(hw, SCTL, E1000_SERDES_LB_ON);
1420 E1000_WRITE_REG(hw, RCTL, rctl);
1438 E1000_WRITE_REG(hw, RCTL, rctl);
1446 E1000_WRITE_REG(hw, SCTL, E1000_SERDES_LB_OFF);
1503 E1000_WRITE_REG(&adapter->hw, RDT, rxdr->count - 1);
1526 E1000_WRITE_REG(&adapter->hw, TDT, k);