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  • only in /netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/drivers/net/cxgb3/

Lines Matching refs:mc7

135  *	@mc7: identifies MC7 to read from
143 int t3_mc7_bd_read(struct mc7 *mc7, unsigned int start, unsigned int n,
149 unsigned int size64 = mc7->size / 8; /* # of 64-bit words */
150 struct adapter *adap = mc7->adapter;
155 start *= (8 << mc7->width);
160 for (i = (1 << mc7->width) - 1; i >= 0; --i) {
164 t3_write_reg(adap, mc7->offset + A_MC7_BD_ADDR, start);
165 t3_write_reg(adap, mc7->offset + A_MC7_BD_OP, 0);
166 val = t3_read_reg(adap, mc7->offset + A_MC7_BD_OP);
169 mc7->offset + A_MC7_BD_OP);
173 val = t3_read_reg(adap, mc7->offset + A_MC7_BD_DATA1);
174 if (mc7->width == 0) {
176 mc7->offset +
180 if (mc7->width > 1)
181 val >>= shift[mc7->width];
182 val64 |= (u64) val << (step[mc7->width] * i);
1438 static void mc7_intr_handler(struct mc7 *mc7)
1440 struct adapter *adapter = mc7->adapter;
1441 u32 cause = t3_read_reg(adapter, mc7->offset + A_MC7_INT_CAUSE);
1444 mc7->stats.corr_err++;
1446 "data 0x%x 0x%x 0x%x\n", mc7->name,
1447 t3_read_reg(adapter, mc7->offset + A_MC7_CE_ADDR),
1448 t3_read_reg(adapter, mc7->offset + A_MC7_CE_DATA0),
1449 t3_read_reg(adapter, mc7->offset + A_MC7_CE_DATA1),
1450 t3_read_reg(adapter, mc7->offset + A_MC7_CE_DATA2));
1454 mc7->stats.uncorr_err++;
1456 "data 0x%x 0x%x 0x%x\n", mc7->name,
1457 t3_read_reg(adapter, mc7->offset + A_MC7_UE_ADDR),
1458 t3_read_reg(adapter, mc7->offset + A_MC7_UE_DATA0),
1459 t3_read_reg(adapter, mc7->offset + A_MC7_UE_DATA1),
1460 t3_read_reg(adapter, mc7->offset + A_MC7_UE_DATA2));
1464 mc7->stats.parity_err++;
1466 mc7->name, G_PE(cause));
1474 mc7->offset + A_MC7_ERR_ADDR);
1475 mc7->stats.addr_err++;
1477 mc7->name, addr);
1483 t3_write_reg(adapter, mc7->offset + A_MC7_INT_CAUSE, cause);
2891 static int mc7_init(struct mc7 *mc7, unsigned int mc7_clock, int mem_type)
2906 struct adapter *adapter = mc7->adapter;
2909 if (!mc7->size)
2912 val = t3_read_reg(adapter, mc7->offset + A_MC7_CFG);
2917 t3_write_reg(adapter, mc7->offset + A_MC7_CFG, val | F_IFEN);
2918 val = t3_read_reg(adapter, mc7->offset + A_MC7_CFG); /* flush */
2922 t3_write_reg(adapter, mc7->offset + A_MC7_CAL, F_SGL_CAL_EN);
2923 t3_read_reg(adapter, mc7->offset + A_MC7_CAL);
2925 if (t3_read_reg(adapter, mc7->offset + A_MC7_CAL) &
2928 mc7->name);
2933 t3_write_reg(adapter, mc7->offset + A_MC7_PARM,
2939 t3_write_reg(adapter, mc7->offset + A_MC7_CFG,
2941 t3_read_reg(adapter, mc7->offset + A_MC7_CFG); /* flush */
2944 t3_set_reg_field(adapter, mc7->offset + A_MC7_DLL, F_DLLENB,
2949 if (wrreg_wait(adapter, mc7->offset + A_MC7_PRE, 0) ||
2950 wrreg_wait(adapter, mc7->offset + A_MC7_EXT_MODE2, 0) ||
2951 wrreg_wait(adapter, mc7->offset + A_MC7_EXT_MODE3, 0) ||
2952 wrreg_wait(adapter, mc7->offset + A_MC7_EXT_MODE1, val))
2956 t3_write_reg(adapter, mc7->offset + A_MC7_MODE, 0x100);
2957 t3_set_reg_field(adapter, mc7->offset + A_MC7_DLL, F_DLLRST, 0);
2961 if (wrreg_wait(adapter, mc7->offset + A_MC7_PRE, 0) ||
2962 wrreg_wait(adapter, mc7->offset + A_MC7_REF, 0) ||
2963 wrreg_wait(adapter, mc7->offset + A_MC7_REF, 0) ||
2964 wrreg_wait(adapter, mc7->offset + A_MC7_MODE,
2966 wrreg_wait(adapter, mc7->offset + A_MC7_EXT_MODE1, val | 0x380) ||
2967 wrreg_wait(adapter, mc7->offset + A_MC7_EXT_MODE1, val))
2974 t3_write_reg(adapter, mc7->offset + A_MC7_REF,
2976 t3_read_reg(adapter, mc7->offset + A_MC7_REF); /* flush */
2978 t3_write_reg(adapter, mc7->offset + A_MC7_ECC, F_ECCGENEN | F_ECCCHKEN);
2979 t3_write_reg(adapter, mc7->offset + A_MC7_BIST_DATA, 0);
2980 t3_write_reg(adapter, mc7->offset + A_MC7_BIST_ADDR_BEG, 0);
2981 t3_write_reg(adapter, mc7->offset + A_MC7_BIST_ADDR_END,
2982 (mc7->size << width) - 1);
2983 t3_write_reg(adapter, mc7->offset + A_MC7_BIST_OP, V_OP(1));
2984 t3_read_reg(adapter, mc7->offset + A_MC7_BIST_OP); /* flush */
2989 val = t3_read_reg(adapter, mc7->offset + A_MC7_BIST_OP);
2992 CH_ERR(adapter, "%s MC7 BIST timed out\n", mc7->name);
2997 t3_set_reg_field(adapter, mc7->offset + A_MC7_CFG, 0, F_RDY);
3206 static void __devinit mc7_prep(struct adapter *adapter, struct mc7 *mc7,
3211 mc7->adapter = adapter;
3212 mc7->name = name;
3213 mc7->offset = base_addr - MC7_PMRX_BASE_ADDR;
3214 cfg = t3_read_reg(adapter, mc7->offset + A_MC7_CFG);
3215 mc7->size = mc7->size = G_DEN(cfg) == M_DEN ? 0 : mc7_calc_size(cfg);
3216 mc7->width = G_WIDTH(cfg);