Lines Matching defs:pvr2_write_register
1240 ret |= pvr2_write_register(hdw, 0x0048, 0xffffffff); /*interrupt mask*/
1244 ret |= pvr2_write_register(hdw, 0xa064, 0x00000000); /*APU command*/
1247 ret |= pvr2_write_register(hdw, 0x9058, 0xffffffed); /*VPU ctrl*/
1248 ret |= pvr2_write_register(hdw, 0x9054, 0xfffffffd); /*reset hw blocks*/
1249 ret |= pvr2_write_register(hdw, 0x07f8, 0x80000800); /*encoder SDRAM refresh*/
1250 ret |= pvr2_write_register(hdw, 0x07fc, 0x0000001a); /*encoder SDRAM pre-charge*/
1251 ret |= pvr2_write_register(hdw, 0x0700, 0x00000000); /*I2C clock*/
1252 ret |= pvr2_write_register(hdw, 0xaa00, 0x00000000); /*unknown*/
1253 ret |= pvr2_write_register(hdw, 0xaa04, 0x00057810); /*unknown*/
1254 ret |= pvr2_write_register(hdw, 0xaa10, 0x00148500); /*unknown*/
1255 ret |= pvr2_write_register(hdw, 0xaa18, 0x00840000); /*unknown*/
1325 ret |= pvr2_write_register(hdw, 0x9054, 0xffffffff); /*reset hw blocks*/
1326 ret |= pvr2_write_register(hdw, 0x9058, 0xffffffe8); /*VPU ctrl*/
2996 int pvr2_write_register(struct pvr2_hdw *hdw, u16 reg, u32 data)
3230 return pvr2_write_register(hdw,PVR2_GPIO_DIR,nval);
3250 return pvr2_write_register(hdw,PVR2_GPIO_OUT,nval);