Lines Matching defs:hdw
3 * $Id: pvrusb2-hdw.c,v 1.1.1.1 2007/08/03 18:52:41 Exp $
32 #include "pvrusb2-hdw.h"
36 #include "pvrusb2-hdw-internal.h"
258 static int pvr2_hdw_cmd_usbstream(struct pvr2_hdw *hdw,int runFl);
259 static int pvr2_hdw_commit_ctl_internal(struct pvr2_hdw *hdw);
260 static int pvr2_hdw_get_eeprom_addr(struct pvr2_hdw *hdw);
261 static void pvr2_hdw_internal_find_stdenum(struct pvr2_hdw *hdw);
262 static void pvr2_hdw_internal_set_std_avail(struct pvr2_hdw *hdw);
263 static void pvr2_hdw_render_useless_unlocked(struct pvr2_hdw *hdw);
264 static void pvr2_hdw_subsys_bit_chg_no_lock(struct pvr2_hdw *hdw,
267 static void pvr2_hdw_subsys_stream_bit_chg_no_lock(struct pvr2_hdw *hdw,
270 static int pvr2_send_request_ex(struct pvr2_hdw *hdw,
277 struct pvr2_hdw *hdw = cptr->hdw;
278 if ((hdw->freqProgSlot > 0) && (hdw->freqProgSlot <= FREQTABLE_SIZE)) {
279 *vp = hdw->freqTable[hdw->freqProgSlot-1];
288 struct pvr2_hdw *hdw = cptr->hdw;
289 unsigned int slotId = hdw->freqProgSlot;
291 hdw->freqTable[slotId-1] = v;
295 if (hdw->freqSelector) {
296 if (hdw->freqSlotRadio == slotId) {
297 hdw->freqSlotRadio = 0;
300 if (hdw->freqSlotTelevision == slotId) {
301 hdw->freqSlotTelevision = 0;
310 *vp = cptr->hdw->freqProgSlot;
316 struct pvr2_hdw *hdw = cptr->hdw;
318 hdw->freqProgSlot = v;
325 struct pvr2_hdw *hdw = cptr->hdw;
326 *vp = hdw->freqSelector ? hdw->freqSlotRadio : hdw->freqSlotTelevision;
333 struct pvr2_hdw *hdw = cptr->hdw;
336 freq = hdw->freqTable[slotId-1];
338 pvr2_hdw_set_cur_freq(hdw,freq);
340 if (hdw->freqSelector) {
341 hdw->freqSlotRadio = slotId;
343 hdw->freqSlotTelevision = slotId;
350 *vp = pvr2_hdw_get_cur_freq(cptr->hdw);
356 return cptr->hdw->freqDirty != 0;
361 cptr->hdw->freqDirty = 0;
366 pvr2_hdw_set_cur_freq(cptr->hdw,v);
373 if (cptr->hdw->std_mask_cur & V4L2_STD_525_60) {
384 if (cptr->hdw->hdw_type == PVR2_HDW_TYPE_24XXX) {
394 *vp = cptr->hdw->input_val;
400 struct pvr2_hdw *hdw = cptr->hdw;
402 if (hdw->input_val != v) {
403 hdw->input_val = v;
404 hdw->input_dirty = !0;
410 if (hdw->input_val == PVR2_CVAL_INPUT_RADIO) {
411 hdw->freqSelector = 0;
412 hdw->freqDirty = !0;
413 } else if (hdw->input_val == PVR2_CVAL_INPUT_TV) {
414 hdw->freqSelector = 1;
415 hdw->freqDirty = !0;
422 return cptr->hdw->input_dirty != 0;
427 cptr->hdw->input_dirty = 0;
434 struct pvr2_hdw *hdw = cptr->hdw;
435 if (hdw->tuner_signal_stale) {
436 pvr2_i2c_core_status_poll(hdw);
438 fv = hdw->tuner_signal_info.rangehigh;
444 if (hdw->tuner_signal_info.capability & V4L2_TUNER_CAP_LOW) {
456 struct pvr2_hdw *hdw = cptr->hdw;
457 if (hdw->tuner_signal_stale) {
458 pvr2_i2c_core_status_poll(hdw);
460 fv = hdw->tuner_signal_info.rangelow;
466 if (hdw->tuner_signal_info.capability & V4L2_TUNER_CAP_LOW) {
477 return cptr->hdw->enc_stale != 0;
482 cptr->hdw->enc_stale = 0;
495 ret = cx2341x_ext_ctrls(&cptr->hdw->enc_ctl_state,&cs,
513 ret = cx2341x_ext_ctrls(&cptr->hdw->enc_ctl_state,&cs,
516 cptr->hdw->enc_stale = !0;
525 cx2341x_ctrl_query(&cptr->hdw->enc_ctl_state,&qctrl);
547 *vp = cptr->hdw->flag_streaming_enabled;
553 int result = pvr2_hdw_is_hsm(cptr->hdw);
562 *vp = cptr->hdw->std_mask_avail;
568 struct pvr2_hdw *hdw = cptr->hdw;
570 ns = hdw->std_mask_avail;
572 if (ns == hdw->std_mask_avail) return 0;
573 hdw->std_mask_avail = ns;
574 pvr2_hdw_internal_set_std_avail(hdw);
575 pvr2_hdw_internal_find_stdenum(hdw);
602 *vp = cptr->hdw->std_mask_cur;
608 struct pvr2_hdw *hdw = cptr->hdw;
610 ns = hdw->std_mask_cur;
612 if (ns == hdw->std_mask_cur) return 0;
613 hdw->std_mask_cur = ns;
614 hdw->std_dirty = !0;
615 pvr2_hdw_internal_find_stdenum(hdw);
621 return cptr->hdw->std_dirty != 0;
626 cptr->hdw->std_dirty = 0;
631 struct pvr2_hdw *hdw = cptr->hdw;
632 pvr2_i2c_core_status_poll(hdw);
633 *vp = hdw->tuner_signal_info.signal;
641 struct pvr2_hdw *hdw = cptr->hdw;
642 pvr2_i2c_core_status_poll(hdw);
643 subchan = hdw->tuner_signal_info.rxsubchans;
662 *vp = cptr->hdw->subsys_enabled_mask;
668 pvr2_hdw_subsys_bit_chg_no_lock(cptr->hdw,m,v);
674 *vp = cptr->hdw->subsys_stream_mask;
680 pvr2_hdw_subsys_stream_bit_chg_no_lock(cptr->hdw,m,v);
686 struct pvr2_hdw *hdw = cptr->hdw;
688 if (v > hdw->std_enum_cnt) return -EINVAL;
689 hdw->std_enum_cur = v;
692 if (hdw->std_mask_cur == hdw->std_defs[v].id) return 0;
693 hdw->std_mask_cur = hdw->std_defs[v].id;
694 hdw->std_dirty = !0;
701 *vp = cptr->hdw->std_enum_cur;
708 return cptr->hdw->std_dirty != 0;
714 cptr->hdw->std_dirty = 0;
745 {*vp = cptr->hdw->vname##_val; return 0;} \
747 {cptr->hdw->vname##_val = v; cptr->hdw->vname##_dirty = !0; return 0;} \
749 {return cptr->hdw->vname##_dirty != 0;} \
751 {cptr->hdw->vname##_dirty = 0;}
1000 struct usb_device *pvr2_hdw_get_dev(struct pvr2_hdw *hdw)
1002 return hdw->usb_dev;
1006 unsigned long pvr2_hdw_get_sn(struct pvr2_hdw *hdw)
1008 return hdw->serial_number;
1012 const char *pvr2_hdw_get_bus_info(struct pvr2_hdw *hdw)
1014 return hdw->bus_info;
1018 unsigned long pvr2_hdw_get_cur_freq(struct pvr2_hdw *hdw)
1020 return hdw->freqSelector ? hdw->freqValTelevision : hdw->freqValRadio;
1025 void pvr2_hdw_set_cur_freq(struct pvr2_hdw *hdw,unsigned long val)
1027 if (hdw->input_val == PVR2_CVAL_INPUT_RADIO) {
1028 if (hdw->freqSelector) {
1030 hdw->freqSelector = 0;
1031 hdw->freqDirty = !0;
1033 if (hdw->freqValRadio != val) {
1034 hdw->freqValRadio = val;
1035 hdw->freqSlotRadio = 0;
1036 hdw->freqDirty = !0;
1039 if (!(hdw->freqSelector)) {
1041 hdw->freqSelector = 1;
1042 hdw->freqDirty = !0;
1044 if (hdw->freqValTelevision != val) {
1045 hdw->freqValTelevision = val;
1046 hdw->freqSlotTelevision = 0;
1047 hdw->freqDirty = !0;
1052 int pvr2_hdw_get_unit_number(struct pvr2_hdw *hdw)
1054 return hdw->unit_number;
1064 static int pvr2_locate_firmware(struct pvr2_hdw *hdw,
1075 &hdw->usb_dev->dev);
1125 static int pvr2_upload_firmware1(struct pvr2_hdw *hdw)
1146 hdw->fw1_state = FW1_STATE_FAILED; // default result
1150 ret = pvr2_locate_firmware(hdw,&fw_entry,"fx2 controller",
1151 fw_file_defs[hdw->hdw_type].cnt,
1152 fw_file_defs[hdw->hdw_type].lst);
1154 if (ret == -ENOENT) hdw->fw1_state = FW1_STATE_MISSING;
1158 usb_settoggle(hdw->usb_dev, 0 & 0xf, !(0 & USB_DIR_IN), 0);
1159 usb_clear_halt(hdw->usb_dev, usb_sndbulkpipe(hdw->usb_dev, 0 & 0x7f));
1161 pipe = usb_sndctrlpipe(hdw->usb_dev, 0);
1176 pvr2_hdw_cpureset_assert(hdw,1);
1184 ret += usb_control_msg(hdw->usb_dev, pipe, 0xa0, 0x40, address,
1191 pvr2_hdw_cpureset_assert(hdw,0);
1200 hdw->fw1_state = FW1_STATE_RELOAD;
1215 int pvr2_upload_firmware2(struct pvr2_hdw *hdw)
1229 ret = pvr2_locate_firmware(hdw,&fw_entry,"encoder",
1237 hdw->enc_cur_valid = 0;
1240 ret |= pvr2_write_register(hdw, 0x0048, 0xffffffff); /*interrupt mask*/
1241 ret |= pvr2_hdw_gpio_chg_dir(hdw,0xffffffff,0x00000088); /*gpio dir*/
1242 ret |= pvr2_hdw_gpio_chg_out(hdw,0xffffffff,0x00000008); /*gpio output state*/
1243 ret |= pvr2_hdw_cmd_deep_reset(hdw);
1244 ret |= pvr2_write_register(hdw, 0xa064, 0x00000000); /*APU command*/
1245 ret |= pvr2_hdw_gpio_chg_dir(hdw,0xffffffff,0x00000408); /*gpio dir*/
1246 ret |= pvr2_hdw_gpio_chg_out(hdw,0xffffffff,0x00000008); /*gpio output state*/
1247 ret |= pvr2_write_register(hdw, 0x9058, 0xffffffed); /*VPU ctrl*/
1248 ret |= pvr2_write_register(hdw, 0x9054, 0xfffffffd); /*reset hw blocks*/
1249 ret |= pvr2_write_register(hdw, 0x07f8, 0x80000800); /*encoder SDRAM refresh*/
1250 ret |= pvr2_write_register(hdw, 0x07fc, 0x0000001a); /*encoder SDRAM pre-charge*/
1251 ret |= pvr2_write_register(hdw, 0x0700, 0x00000000); /*I2C clock*/
1252 ret |= pvr2_write_register(hdw, 0xaa00, 0x00000000); /*unknown*/
1253 ret |= pvr2_write_register(hdw, 0xaa04, 0x00057810); /*unknown*/
1254 ret |= pvr2_write_register(hdw, 0xaa10, 0x00148500); /*unknown*/
1255 ret |= pvr2_write_register(hdw, 0xaa18, 0x00840000); /*unknown*/
1256 LOCK_TAKE(hdw->ctl_lock); do {
1257 hdw->cmd_buffer[0] = FX2CMD_FWPOST1;
1258 ret |= pvr2_send_request(hdw,hdw->cmd_buffer,1,NULL,0);
1259 hdw->cmd_buffer[0] = FX2CMD_MEMSEL;
1260 hdw->cmd_buffer[1] = 0;
1261 ret |= pvr2_send_request(hdw,hdw->cmd_buffer,2,NULL,0);
1262 } while (0); LOCK_GIVE(hdw->ctl_lock);
1292 pipe = usb_sndbulkpipe(hdw->usb_dev, PVR2_FIRMWARE_ENDPOINT);
1304 ret |= usb_bulk_msg(hdw->usb_dev, pipe, fw_ptr,bcnt,
1325 ret |= pvr2_write_register(hdw, 0x9054, 0xffffffff); /*reset hw blocks*/
1326 ret |= pvr2_write_register(hdw, 0x9058, 0xffffffe8); /*VPU ctrl*/
1327 LOCK_TAKE(hdw->ctl_lock); do {
1328 hdw->cmd_buffer[0] = FX2CMD_MEMSEL;
1329 hdw->cmd_buffer[1] = 0;
1330 ret |= pvr2_send_request(hdw,hdw->cmd_buffer,2,NULL,0);
1331 } while (0); LOCK_GIVE(hdw->ctl_lock);
1337 hdw->subsys_enabled_mask |= (1<<PVR2_SUBSYS_B_ENC_FIRMWARE);
1379 static void pvr2_hdw_subsys_bit_chg_no_lock(struct pvr2_hdw *hdw,
1388 if (!hdw->flag_ok) return;
1391 nmsk = (hdw->subsys_enabled_mask & ~msk) | (val & msk);
1396 if (!((nmsk ^ hdw->subsys_enabled_mask) &
1402 pvr2_hdw_render_useless(hdw);
1412 msk,val,hdw->subsys_enabled_mask,nmsk);
1414 vmsk = (nmsk ^ hdw->subsys_enabled_mask) &
1415 hdw->subsys_enabled_mask;
1421 ret = pvr2_encoder_stop(hdw);
1425 hdw->subsys_enabled_mask &=
1434 pvr2_hdw_cmd_usbstream(hdw,0);
1440 if (hdw->decoder_ctrl) {
1441 hdw->decoder_ctrl->enable(
1442 hdw->decoder_ctrl->ctxt,0);
1448 hdw->subsys_enabled_mask &=
1452 hdw->subsys_enabled_mask &=
1456 vmsk = (nmsk ^ hdw->subsys_enabled_mask) & nmsk;
1462 ret = pvr2_upload_firmware2(hdw);
1467 pvr2_hdw_render_useless(hdw);
1475 ret = pvr2_encoder_configure(hdw);
1479 hdw->subsys_enabled_mask &=
1488 if (hdw->decoder_ctrl) {
1489 hdw->decoder_ctrl->enable(
1490 hdw->decoder_ctrl->ctxt,!0);
1496 hdw->subsys_enabled_mask |=
1503 pvr2_hdw_cmd_usbstream(hdw,!0);
1509 ret = pvr2_encoder_start(hdw);
1513 hdw->subsys_enabled_mask &=
1523 void pvr2_hdw_subsys_bit_chg(struct pvr2_hdw *hdw,
1526 LOCK_TAKE(hdw->big_lock); do {
1527 pvr2_hdw_subsys_bit_chg_no_lock(hdw,msk,val);
1528 } while (0); LOCK_GIVE(hdw->big_lock);
1532 unsigned long pvr2_hdw_subsys_get(struct pvr2_hdw *hdw)
1534 return hdw->subsys_enabled_mask;
1538 unsigned long pvr2_hdw_subsys_stream_get(struct pvr2_hdw *hdw)
1540 return hdw->subsys_stream_mask;
1544 static void pvr2_hdw_subsys_stream_bit_chg_no_lock(struct pvr2_hdw *hdw,
1550 val2 = ((hdw->subsys_stream_mask & ~msk) | (val & msk));
1553 msk,val,hdw->subsys_stream_mask,val2);
1554 hdw->subsys_stream_mask = val2;
1558 void pvr2_hdw_subsys_stream_bit_chg(struct pvr2_hdw *hdw,
1562 LOCK_TAKE(hdw->big_lock); do {
1563 pvr2_hdw_subsys_stream_bit_chg_no_lock(hdw,msk,val);
1564 } while (0); LOCK_GIVE(hdw->big_lock);
1568 static int pvr2_hdw_set_streaming_no_lock(struct pvr2_hdw *hdw,int enableFl)
1570 if ((!enableFl) == !(hdw->flag_streaming_enabled)) return 0;
1574 pvr2_hdw_subsys_bit_chg_no_lock(hdw,~0,~0);
1578 pvr2_hdw_subsys_bit_chg_no_lock(hdw,hdw->subsys_stream_mask,0);
1580 if (!hdw->flag_ok) return -EIO;
1581 hdw->flag_streaming_enabled = enableFl != 0;
1586 int pvr2_hdw_get_streaming(struct pvr2_hdw *hdw)
1588 return hdw->flag_streaming_enabled != 0;
1592 int pvr2_hdw_set_streaming(struct pvr2_hdw *hdw,int enable_flag)
1595 LOCK_TAKE(hdw->big_lock); do {
1596 ret = pvr2_hdw_set_streaming_no_lock(hdw,enable_flag);
1597 } while (0); LOCK_GIVE(hdw->big_lock);
1602 static int pvr2_hdw_set_stream_type_no_lock(struct pvr2_hdw *hdw,
1605 unsigned long sm = hdw->subsys_enabled_mask;
1606 if (!hdw->flag_ok) return -EIO;
1607 pvr2_hdw_subsys_bit_chg_no_lock(hdw,hdw->subsys_stream_mask,0);
1608 hdw->config = config;
1609 pvr2_hdw_subsys_bit_chg_no_lock(hdw,~0,sm);
1614 int pvr2_hdw_set_stream_type(struct pvr2_hdw *hdw,enum pvr2_config config)
1617 if (!hdw->flag_ok) return -EIO;
1618 LOCK_TAKE(hdw->big_lock);
1619 ret = pvr2_hdw_set_stream_type_no_lock(hdw,config);
1620 LOCK_GIVE(hdw->big_lock);
1625 static int get_default_tuner_type(struct pvr2_hdw *hdw)
1627 int unit_number = hdw->unit_number;
1633 hdw->tuner_type = tp;
1638 static v4l2_std_id get_default_standard(struct pvr2_hdw *hdw)
1640 int unit_number = hdw->unit_number;
1649 static unsigned int get_default_error_tolerance(struct pvr2_hdw *hdw)
1651 int unit_number = hdw->unit_number;
1660 static int pvr2_hdw_check_firmware(struct pvr2_hdw *hdw)
1667 LOCK_TAKE(hdw->ctl_lock); do {
1668 hdw->cmd_buffer[0] = FX2CMD_GET_EEPROM_ADDR;
1669 result = pvr2_send_request_ex(hdw,HZ*1,!0,
1670 hdw->cmd_buffer,1,
1671 hdw->cmd_buffer,1);
1673 } while(0); LOCK_GIVE(hdw->ctl_lock);
1685 static void pvr2_hdw_setup_std(struct pvr2_hdw *hdw)
1691 std1 = get_default_standard(hdw);
1693 bcnt = pvr2_std_id_to_str(buf,sizeof(buf),hdw->std_mask_eeprom);
1698 hdw->std_mask_avail = hdw->std_mask_eeprom;
1700 std2 = std1 & ~hdw->std_mask_avail;
1707 hdw->std_mask_avail |= std2;
1710 pvr2_hdw_internal_set_std_avail(hdw);
1717 hdw->std_mask_cur = std1;
1718 hdw->std_dirty = !0;
1719 pvr2_hdw_internal_find_stdenum(hdw);
1723 if (hdw->std_enum_cnt > 1) {
1725 hdw->std_enum_cur = 1;
1726 hdw->std_mask_cur = hdw->std_defs[hdw->std_enum_cur-1].id;
1727 hdw->std_dirty = !0;
1730 hdw->std_defs[hdw->std_enum_cur-1].name);
1739 static void pvr2_hdw_setup_low(struct pvr2_hdw *hdw)
1746 reloadFl = (hdw->usb_intf->cur_altsetting->desc.bNumEndpoints
1755 reloadFl = !pvr2_hdw_check_firmware(hdw);
1763 if (pvr2_upload_firmware1(hdw) != 0) {
1769 hdw->fw1_state = FW1_STATE_OK;
1772 pvr2_hdw_device_reset(hdw);
1774 if (!pvr2_hdw_dev_ok(hdw)) return;
1776 for (idx = 0; idx < pvr2_client_lists[hdw->hdw_type].cnt; idx++) {
1777 request_module(pvr2_client_lists[hdw->hdw_type].lst[idx]);
1780 pvr2_hdw_cmd_powerup(hdw);
1781 if (!pvr2_hdw_dev_ok(hdw)) return;
1783 if (pvr2_upload_firmware2(hdw)){
1785 pvr2_hdw_render_useless(hdw);
1790 pvr2_i2c_core_init(hdw);
1791 if (!pvr2_hdw_dev_ok(hdw)) return;
1794 cptr = hdw->controls + idx;
1806 hdw->freqValTelevision = 175250000L;
1808 hdw->freqValRadio = 104300000L;
1814 ret = pvr2_hdw_get_eeprom_addr(hdw);
1815 if (!pvr2_hdw_dev_ok(hdw)) return;
1820 hdw->eeprom_addr = ret;
1821 pvr2_eeprom_analyze(hdw);
1822 if (!pvr2_hdw_dev_ok(hdw)) return;
1825 pvr2_hdw_setup_std(hdw);
1827 if (!get_default_tuner_type(hdw)) {
1830 hdw->tuner_type);
1833 hdw->tuner_updated = !0;
1834 pvr2_i2c_core_check_stale(hdw);
1835 hdw->tuner_updated = 0;
1837 if (!pvr2_hdw_dev_ok(hdw)) return;
1839 pvr2_hdw_commit_ctl_internal(hdw);
1840 if (!pvr2_hdw_dev_ok(hdw)) return;
1842 hdw->vid_stream = pvr2_stream_create();
1843 if (!pvr2_hdw_dev_ok(hdw)) return;
1845 "pvr2_hdw_setup: video stream is %p",hdw->vid_stream);
1846 if (hdw->vid_stream) {
1847 idx = get_default_error_tolerance(hdw);
1852 hdw->vid_stream,idx);
1854 pvr2_stream_setup(hdw->vid_stream,hdw->usb_dev,
1858 if (!pvr2_hdw_dev_ok(hdw)) return;
1861 pvr2_i2c_core_sync(hdw);
1863 if (!pvr2_hdw_dev_ok(hdw)) return;
1865 hdw->flag_init_ok = !0;
1869 int pvr2_hdw_setup(struct pvr2_hdw *hdw)
1871 pvr2_trace(PVR2_TRACE_INIT,"pvr2_hdw_setup(hdw=%p) begin",hdw);
1872 LOCK_TAKE(hdw->big_lock); do {
1873 pvr2_hdw_setup_low(hdw);
1875 "pvr2_hdw_setup(hdw=%p) done, ok=%d init_ok=%d",
1876 hdw,hdw->flag_ok,hdw->flag_init_ok);
1877 if (pvr2_hdw_dev_ok(hdw)) {
1878 if (pvr2_hdw_init_ok(hdw)) {
1885 if (hdw->fw1_state == FW1_STATE_RELOAD) {
1896 if (hdw->fw1_state == FW1_STATE_MISSING) {
1914 hdw->fw1_state = FW1_STATE_UNKNOWN;
1915 pvr2_upload_firmware1(hdw);
1928 } while (0); LOCK_GIVE(hdw->big_lock);
1929 pvr2_trace(PVR2_TRACE_INIT,"pvr2_hdw_setup(hdw=%p) end",hdw);
1930 return hdw->flag_init_ok;
1940 struct pvr2_hdw *hdw;
1955 hdw = kzalloc(sizeof(*hdw),GFP_KERNEL);
1956 pvr2_trace(PVR2_TRACE_INIT,"pvr2_hdw_create: hdw=%p, type \"%s\"",
1957 hdw,pvr2_device_names[hdw_type]);
1958 if (!hdw) goto fail;
1959 hdw->tuner_signal_stale = !0;
1960 cx2341x_fill_defaults(&hdw->enc_ctl_state);
1962 hdw->control_cnt = CTRLDEF_COUNT;
1963 hdw->control_cnt += MPEGDEF_COUNT;
1964 hdw->controls = kzalloc(sizeof(struct pvr2_ctrl) * hdw->control_cnt,
1966 if (!hdw->controls) goto fail;
1967 hdw->hdw_type = hdw_type;
1968 for (idx = 0; idx < hdw->control_cnt; idx++) {
1969 cptr = hdw->controls + idx;
1970 cptr->hdw = hdw;
1973 hdw->std_mask_ptrs[idx] = hdw->std_mask_names[idx];
1976 cptr = hdw->controls + idx;
1980 hdw->mpeg_ctrl_info = kzalloc(
1981 sizeof(*(hdw->mpeg_ctrl_info)) * MPEGDEF_COUNT, GFP_KERNEL);
1982 if (!hdw->mpeg_ctrl_info) goto fail;
1984 cptr = hdw->controls + idx + CTRLDEF_COUNT;
1985 ciptr = &(hdw->mpeg_ctrl_info[idx].info);
1986 ciptr->desc = hdw->mpeg_ctrl_info[idx].desc;
1995 cx2341x_ctrl_query(&hdw->enc_ctl_state,&qctrl);
1999 strncpy(hdw->mpeg_ctrl_info[idx].desc,qctrl.name,
2001 hdw->mpeg_ctrl_info[idx].desc[PVR2_CTLD_INFO_DESC_SIZE-1] = 0;
2027 cptr = pvr2_hdw_get_ctrl_by_id(hdw,PVR2_CID_STDENUM);
2029 memcpy(&hdw->std_info_enum,cptr->info,
2030 sizeof(hdw->std_info_enum));
2031 cptr->info = &hdw->std_info_enum;
2039 hdw->std_mask_names[idx],
2040 sizeof(hdw->std_mask_names[idx])-1,
2042 hdw->std_mask_names[idx][cnt1] = 0;
2044 cptr = pvr2_hdw_get_ctrl_by_id(hdw,PVR2_CID_STDAVAIL);
2046 memcpy(&hdw->std_info_avail,cptr->info,
2047 sizeof(hdw->std_info_avail));
2048 cptr->info = &hdw->std_info_avail;
2049 hdw->std_info_avail.def.type_bitmask.bit_names =
2050 hdw->std_mask_ptrs;
2051 hdw->std_info_avail.def.type_bitmask.valid_bits =
2054 cptr = pvr2_hdw_get_ctrl_by_id(hdw,PVR2_CID_STDCUR);
2056 memcpy(&hdw->std_info_cur,cptr->info,
2057 sizeof(hdw->std_info_cur));
2058 cptr->info = &hdw->std_info_cur;
2059 hdw->std_info_cur.def.type_bitmask.bit_names =
2060 hdw->std_mask_ptrs;
2061 hdw->std_info_avail.def.type_bitmask.valid_bits =
2065 hdw->eeprom_addr = -1;
2066 hdw->unit_number = -1;
2067 hdw->v4l_minor_number_video = -1;
2068 hdw->v4l_minor_number_vbi = -1;
2069 hdw->v4l_minor_number_radio = -1;
2070 hdw->ctl_write_buffer = kmalloc(PVR2_CTL_BUFFSIZE,GFP_KERNEL);
2071 if (!hdw->ctl_write_buffer) goto fail;
2072 hdw->ctl_read_buffer = kmalloc(PVR2_CTL_BUFFSIZE,GFP_KERNEL);
2073 if (!hdw->ctl_read_buffer) goto fail;
2074 hdw->ctl_write_urb = usb_alloc_urb(0,GFP_KERNEL);
2075 if (!hdw->ctl_write_urb) goto fail;
2076 hdw->ctl_read_urb = usb_alloc_urb(0,GFP_KERNEL);
2077 if (!hdw->ctl_read_urb) goto fail;
2082 hdw->unit_number = idx;
2083 unit_pointers[idx] = hdw;
2089 cnt2 = scnprintf(hdw->name+cnt1,sizeof(hdw->name)-cnt1,"pvrusb2");
2091 if (hdw->unit_number >= 0) {
2092 cnt2 = scnprintf(hdw->name+cnt1,sizeof(hdw->name)-cnt1,"_%c",
2093 ('a' + hdw->unit_number));
2096 if (cnt1 >= sizeof(hdw->name)) cnt1 = sizeof(hdw->name)-1;
2097 hdw->name[cnt1] = 0;
2100 hdw->unit_number,hdw->name);
2102 hdw->tuner_type = -1;
2103 hdw->flag_ok = !0;
2106 hdw->subsys_stream_mask = PVR2_SUBSYS_RUN_ALL;
2107 hdw->subsys_stream_mask |= (1<<PVR2_SUBSYS_B_ENC_CFG);
2110 hdw->subsys_stream_mask);
2112 hdw->usb_intf = intf;
2113 hdw->usb_dev = interface_to_usbdev(intf);
2115 scnprintf(hdw->bus_info,sizeof(hdw->bus_info),
2117 hdw->usb_dev->dev.bus_id,
2118 hdw->usb_dev->devnum);
2120 ifnum = hdw->usb_intf->cur_altsetting->desc.bInterfaceNumber;
2121 usb_set_interface(hdw->usb_dev,ifnum,0);
2123 mutex_init(&hdw->ctl_lock_mutex);
2124 mutex_init(&hdw->big_lock_mutex);
2126 return hdw;
2128 if (hdw) {
2129 usb_free_urb(hdw->ctl_read_urb);
2130 usb_free_urb(hdw->ctl_write_urb);
2131 kfree(hdw->ctl_read_buffer);
2132 kfree(hdw->ctl_write_buffer);
2133 kfree(hdw->controls);
2134 kfree(hdw->mpeg_ctrl_info);
2135 kfree(hdw);
2143 static void pvr2_hdw_remove_usb_stuff(struct pvr2_hdw *hdw)
2145 if (hdw->flag_disconnected) return;
2146 pvr2_trace(PVR2_TRACE_INIT,"pvr2_hdw_remove_usb_stuff: hdw=%p",hdw);
2147 if (hdw->ctl_read_urb) {
2148 usb_kill_urb(hdw->ctl_read_urb);
2149 usb_free_urb(hdw->ctl_read_urb);
2150 hdw->ctl_read_urb = NULL;
2152 if (hdw->ctl_write_urb) {
2153 usb_kill_urb(hdw->ctl_write_urb);
2154 usb_free_urb(hdw->ctl_write_urb);
2155 hdw->ctl_write_urb = NULL;
2157 if (hdw->ctl_read_buffer) {
2158 kfree(hdw->ctl_read_buffer);
2159 hdw->ctl_read_buffer = NULL;
2161 if (hdw->ctl_write_buffer) {
2162 kfree(hdw->ctl_write_buffer);
2163 hdw->ctl_write_buffer = NULL;
2165 pvr2_hdw_render_useless_unlocked(hdw);
2166 hdw->flag_disconnected = !0;
2167 hdw->usb_dev = NULL;
2168 hdw->usb_intf = NULL;
2173 void pvr2_hdw_destroy(struct pvr2_hdw *hdw)
2175 pvr2_trace(PVR2_TRACE_INIT,"pvr2_hdw_destroy: hdw=%p",hdw);
2176 if (hdw->fw_buffer) {
2177 kfree(hdw->fw_buffer);
2178 hdw->fw_buffer = NULL;
2180 if (hdw->vid_stream) {
2181 pvr2_stream_destroy(hdw->vid_stream);
2182 hdw->vid_stream = NULL;
2184 if (hdw->decoder_ctrl) {
2185 hdw->decoder_ctrl->detach(hdw->decoder_ctrl->ctxt);
2187 pvr2_i2c_core_done(hdw);
2188 pvr2_hdw_remove_usb_stuff(hdw);
2190 if ((hdw->unit_number >= 0) &&
2191 (hdw->unit_number < PVR_NUM) &&
2192 (unit_pointers[hdw->unit_number] == hdw)) {
2193 unit_pointers[hdw->unit_number] = NULL;
2196 kfree(hdw->controls);
2197 kfree(hdw->mpeg_ctrl_info);
2198 kfree(hdw->std_defs);
2199 kfree(hdw->std_enum_names);
2200 kfree(hdw);
2204 int pvr2_hdw_init_ok(struct pvr2_hdw *hdw)
2206 return hdw->flag_init_ok;
2210 int pvr2_hdw_dev_ok(struct pvr2_hdw *hdw)
2212 return (hdw && hdw->flag_ok);
2217 void pvr2_hdw_disconnect(struct pvr2_hdw *hdw)
2219 pvr2_trace(PVR2_TRACE_INIT,"pvr2_hdw_disconnect(hdw=%p)",hdw);
2220 LOCK_TAKE(hdw->big_lock);
2221 LOCK_TAKE(hdw->ctl_lock);
2222 pvr2_hdw_remove_usb_stuff(hdw);
2223 LOCK_GIVE(hdw->ctl_lock);
2224 LOCK_GIVE(hdw->big_lock);
2230 static void pvr2_hdw_internal_find_stdenum(struct pvr2_hdw *hdw)
2233 for (idx = 1; idx < hdw->std_enum_cnt; idx++) {
2234 if (hdw->std_defs[idx-1].id == hdw->std_mask_cur) {
2235 hdw->std_enum_cur = idx;
2239 hdw->std_enum_cur = 0;
2245 static void pvr2_hdw_internal_set_std_avail(struct pvr2_hdw *hdw)
2251 newstd = pvr2_std_create_enum(&std_cnt,hdw->std_mask_avail);
2253 if (hdw->std_defs) {
2254 kfree(hdw->std_defs);
2255 hdw->std_defs = NULL;
2257 hdw->std_enum_cnt = 0;
2258 if (hdw->std_enum_names) {
2259 kfree(hdw->std_enum_names);
2260 hdw->std_enum_names = NULL;
2268 hdw->std_enum_names = kmalloc(sizeof(char *)*(std_cnt+1),GFP_KERNEL);
2269 hdw->std_enum_names[0] = "none";
2271 hdw->std_enum_names[idx+1] =
2275 hdw->std_info_enum.def.type_enum.value_names = hdw->std_enum_names;
2276 hdw->std_info_enum.def.type_enum.count = std_cnt+1;
2277 hdw->std_defs = newstd;
2278 hdw->std_enum_cnt = std_cnt+1;
2279 hdw->std_enum_cur = 0;
2280 hdw->std_info_cur.def.type_bitmask.valid_bits = hdw->std_mask_avail;
2284 int pvr2_hdw_get_stdenum_value(struct pvr2_hdw *hdw,
2290 LOCK_TAKE(hdw->big_lock); do {
2291 if (idx >= hdw->std_enum_cnt) break;
2293 memcpy(std,hdw->std_defs+idx,sizeof(*std));
2295 } while (0); LOCK_GIVE(hdw->big_lock);
2301 unsigned int pvr2_hdw_get_ctrl_count(struct pvr2_hdw *hdw)
2303 return hdw->control_cnt;
2308 struct pvr2_ctrl *pvr2_hdw_get_ctrl_by_index(struct pvr2_hdw *hdw,
2311 if (idx >= hdw->control_cnt) return NULL;
2312 return hdw->controls + idx;
2317 struct pvr2_ctrl *pvr2_hdw_get_ctrl_by_id(struct pvr2_hdw *hdw,
2325 for (idx = 0; idx < hdw->control_cnt; idx++) {
2326 cptr = hdw->controls + idx;
2335 struct pvr2_ctrl *pvr2_hdw_get_ctrl_v4l(struct pvr2_hdw *hdw,unsigned int ctl_id)
2342 for (idx = 0; idx < hdw->control_cnt; idx++) {
2343 cptr = hdw->controls + idx;
2353 struct pvr2_ctrl *pvr2_hdw_get_ctrl_nextv4l(struct pvr2_hdw *hdw,
2362 for (idx = 0; idx < hdw->control_cnt; idx++) {
2363 cptr = hdw->controls + idx;
2394 static int pvr2_hdw_commit_ctl_internal(struct pvr2_hdw *hdw)
2396 unsigned long saved_subsys_mask = hdw->subsys_enabled_mask;
2405 for (idx = 0; idx < hdw->control_cnt; idx++) {
2406 cptr = hdw->controls + idx;
2435 if (hdw->std_dirty) {
2439 if (hdw->std_mask_cur & V4L2_STD_525_60) {
2444 if (nvres != hdw->res_ver_val) {
2445 hdw->res_ver_val = nvres;
2446 hdw->res_ver_dirty = !0;
2450 if (hdw->std_dirty ||
2451 hdw->enc_stale ||
2452 hdw->srate_dirty ||
2453 hdw->res_ver_dirty ||
2454 hdw->res_hor_dirty ||
2461 if (hdw->input_dirty) {
2468 if (hdw->srate_dirty) {
2480 c1.value = hdw->srate_val;
2481 cx2341x_ext_ctrls(&hdw->enc_ctl_state,&cs,VIDIOC_S_EXT_CTRLS);
2488 pvr2_i2c_core_check_stale(hdw);
2490 for (idx = 0; idx < hdw->control_cnt; idx++) {
2491 cptr = hdw->controls + idx;
2497 pvr2_i2c_core_sync(hdw);
2499 pvr2_hdw_subsys_bit_chg_no_lock(hdw,stale_subsys_mask,0);
2500 pvr2_hdw_subsys_bit_chg_no_lock(hdw,~0,saved_subsys_mask);
2506 int pvr2_hdw_commit_ctl(struct pvr2_hdw *hdw)
2508 LOCK_TAKE(hdw->big_lock); do {
2509 pvr2_hdw_commit_ctl_internal(hdw);
2510 } while (0); LOCK_GIVE(hdw->big_lock);
2515 void pvr2_hdw_poll(struct pvr2_hdw *hdw)
2517 LOCK_TAKE(hdw->big_lock); do {
2518 pvr2_i2c_core_sync(hdw);
2519 } while (0); LOCK_GIVE(hdw->big_lock);
2523 void pvr2_hdw_setup_poll_trigger(struct pvr2_hdw *hdw,
2527 LOCK_TAKE(hdw->big_lock); do {
2528 hdw->poll_trigger_func = func;
2529 hdw->poll_trigger_data = data;
2530 } while (0); LOCK_GIVE(hdw->big_lock);
2534 void pvr2_hdw_poll_trigger_unlocked(struct pvr2_hdw *hdw)
2536 if (hdw->poll_trigger_func) {
2537 hdw->poll_trigger_func(hdw->poll_trigger_data);
2542 const char *pvr2_hdw_get_driver_name(struct pvr2_hdw *hdw)
2544 return hdw->name;
2548 int pvr2_hdw_is_hsm(struct pvr2_hdw *hdw)
2551 LOCK_TAKE(hdw->ctl_lock); do {
2552 hdw->cmd_buffer[0] = FX2CMD_GET_USB_SPEED;
2553 result = pvr2_send_request(hdw,
2554 hdw->cmd_buffer,1,
2555 hdw->cmd_buffer,1);
2557 result = (hdw->cmd_buffer[0] != 0);
2558 } while(0); LOCK_GIVE(hdw->ctl_lock);
2564 void pvr2_hdw_execute_tuner_poll(struct pvr2_hdw *hdw)
2566 LOCK_TAKE(hdw->big_lock); do {
2567 pvr2_i2c_core_status_poll(hdw);
2568 } while (0); LOCK_GIVE(hdw->big_lock);
2573 int pvr2_hdw_get_tuner_status(struct pvr2_hdw *hdw,struct v4l2_tuner *vtp)
2575 LOCK_TAKE(hdw->big_lock); do {
2576 if (hdw->tuner_signal_stale) {
2577 pvr2_i2c_core_status_poll(hdw);
2579 memcpy(vtp,&hdw->tuner_signal_info,sizeof(struct v4l2_tuner));
2580 } while (0); LOCK_GIVE(hdw->big_lock);
2592 void pvr2_hdw_trigger_module_log(struct pvr2_hdw *hdw)
2594 int nr = pvr2_hdw_get_unit_number(hdw);
2595 LOCK_TAKE(hdw->big_lock); do {
2596 hdw->log_requested = !0;
2598 pvr2_i2c_core_check_stale(hdw);
2599 hdw->log_requested = 0;
2600 pvr2_i2c_core_sync(hdw);
2602 cx2341x_log_status(&hdw->enc_ctl_state, "pvrusb2");
2604 } while (0); LOCK_GIVE(hdw->big_lock);
2607 void pvr2_hdw_cpufw_set_enabled(struct pvr2_hdw *hdw, int enable_flag)
2612 LOCK_TAKE(hdw->big_lock); do {
2613 if ((hdw->fw_buffer == 0) == !enable_flag) break;
2618 kfree(hdw->fw_buffer);
2619 hdw->fw_buffer = NULL;
2620 hdw->fw_size = 0;
2623 pvr2_hdw_cpureset_assert(hdw,0);
2629 hdw->fw_size = 0x2000;
2630 hdw->fw_buffer = kzalloc(hdw->fw_size,GFP_KERNEL);
2631 if (!hdw->fw_buffer) {
2632 hdw->fw_size = 0;
2637 pvr2_hdw_cpureset_assert(hdw,1);
2643 pipe = usb_rcvctrlpipe(hdw->usb_dev, 0);
2644 for(address = 0; address < hdw->fw_size; address += 0x800) {
2645 ret = usb_control_msg(hdw->usb_dev,pipe,0xa0,0xc0,
2647 hdw->fw_buffer+address,0x800,HZ);
2653 } while (0); LOCK_GIVE(hdw->big_lock);
2658 int pvr2_hdw_cpufw_get_enabled(struct pvr2_hdw *hdw)
2660 return hdw->fw_buffer != 0;
2664 int pvr2_hdw_cpufw_get(struct pvr2_hdw *hdw,unsigned int offs,
2668 LOCK_TAKE(hdw->big_lock); do {
2672 if (!hdw->fw_buffer) {
2677 if (offs >= hdw->fw_size) {
2685 if (offs + cnt > hdw->fw_size) cnt = hdw->fw_size - offs;
2687 memcpy(buf,hdw->fw_buffer+offs,cnt);
2693 } while (0); LOCK_GIVE(hdw->big_lock);
2699 int pvr2_hdw_v4l_get_minor_number(struct pvr2_hdw *hdw,
2703 case pvr2_v4l_type_video: return hdw->v4l_minor_number_video;
2704 case pvr2_v4l_type_vbi: return hdw->v4l_minor_number_vbi;
2705 case pvr2_v4l_type_radio: return hdw->v4l_minor_number_radio;
2712 void pvr2_hdw_v4l_store_minor_number(struct pvr2_hdw *hdw,
2716 case pvr2_v4l_type_video: hdw->v4l_minor_number_video = v;
2717 case pvr2_v4l_type_vbi: hdw->v4l_minor_number_vbi = v;
2718 case pvr2_v4l_type_radio: hdw->v4l_minor_number_radio = v;
2726 struct pvr2_hdw *hdw = urb->context;
2727 hdw->ctl_write_pend_flag = 0;
2728 if (hdw->ctl_read_pend_flag) return;
2729 complete(&hdw->ctl_done);
2735 struct pvr2_hdw *hdw = urb->context;
2736 hdw->ctl_read_pend_flag = 0;
2737 if (hdw->ctl_write_pend_flag) return;
2738 complete(&hdw->ctl_done);
2744 struct pvr2_hdw *hdw = (struct pvr2_hdw *)data;
2745 if (hdw->ctl_write_pend_flag || hdw->ctl_read_pend_flag) {
2746 hdw->ctl_timeout_flag = !0;
2747 if (hdw->ctl_write_pend_flag)
2748 usb_unlink_urb(hdw->ctl_write_urb);
2749 if (hdw->ctl_read_pend_flag)
2750 usb_unlink_urb(hdw->ctl_read_urb);
2759 static int pvr2_send_request_ex(struct pvr2_hdw *hdw,
2767 if (!hdw->ctl_lock_held) {
2773 if ((!hdw->flag_ok) && !probe_fl) {
2779 if (!(hdw->ctl_read_urb && hdw->ctl_write_urb)) {
2815 hdw->cmd_debug_state = 1;
2817 hdw->cmd_debug_code = ((unsigned char *)write_data)[0];
2819 hdw->cmd_debug_code = 0;
2821 hdw->cmd_debug_write_len = write_len;
2822 hdw->cmd_debug_read_len = read_len;
2825 init_completion(&hdw->ctl_done);
2826 hdw->ctl_timeout_flag = 0;
2827 hdw->ctl_write_pend_flag = 0;
2828 hdw->ctl_read_pend_flag = 0;
2831 timer.data = (unsigned long)hdw;
2835 hdw->cmd_debug_state = 2;
2838 hdw->ctl_write_buffer[idx] =
2842 usb_fill_bulk_urb(hdw->ctl_write_urb,
2843 hdw->usb_dev,
2844 usb_sndbulkpipe(hdw->usb_dev,
2846 hdw->ctl_write_buffer,
2849 hdw);
2850 hdw->ctl_write_urb->actual_length = 0;
2851 hdw->ctl_write_pend_flag = !0;
2852 status = usb_submit_urb(hdw->ctl_write_urb,GFP_KERNEL);
2857 hdw->ctl_write_pend_flag = 0;
2863 hdw->cmd_debug_state = 3;
2864 memset(hdw->ctl_read_buffer,0x43,read_len);
2866 usb_fill_bulk_urb(hdw->ctl_read_urb,
2867 hdw->usb_dev,
2868 usb_rcvbulkpipe(hdw->usb_dev,
2870 hdw->ctl_read_buffer,
2873 hdw);
2874 hdw->ctl_read_urb->actual_length = 0;
2875 hdw->ctl_read_pend_flag = !0;
2876 status = usb_submit_urb(hdw->ctl_read_urb,GFP_KERNEL);
2881 hdw->ctl_read_pend_flag = 0;
2890 hdw->cmd_debug_state = 4;
2891 while (hdw->ctl_write_pend_flag || hdw->ctl_read_pend_flag) {
2892 wait_for_completion(&hdw->ctl_done);
2894 hdw->cmd_debug_state = 5;
2899 hdw->cmd_debug_state = 6;
2902 if (hdw->ctl_timeout_flag) {
2913 if ((hdw->ctl_write_urb->status != 0) &&
2914 (hdw->ctl_write_urb->status != -ENOENT) &&
2915 (hdw->ctl_write_urb->status != -ESHUTDOWN) &&
2916 (hdw->ctl_write_urb->status != -ECONNRESET)) {
2919 status = hdw->ctl_write_urb->status;
2928 if (hdw->ctl_write_urb->actual_length < write_len) {
2936 hdw->ctl_write_urb->actual_length);
2943 if ((hdw->ctl_read_urb->status != 0) &&
2944 (hdw->ctl_read_urb->status != -ENOENT) &&
2945 (hdw->ctl_read_urb->status != -ESHUTDOWN) &&
2946 (hdw->ctl_read_urb->status != -ECONNRESET)) {
2949 status = hdw->ctl_read_urb->status;
2958 if (hdw->ctl_read_urb->actual_length < read_len) {
2966 hdw->ctl_read_urb->actual_length);
2973 hdw->ctl_read_buffer[idx];
2979 hdw->cmd_debug_state = 0;
2981 pvr2_hdw_render_useless_unlocked(hdw);
2987 int pvr2_send_request(struct pvr2_hdw *hdw,
2991 return pvr2_send_request_ex(hdw,HZ*4,0,
2996 int pvr2_write_register(struct pvr2_hdw *hdw, u16 reg, u32 data)
3000 LOCK_TAKE(hdw->ctl_lock);
3002 hdw->cmd_buffer[0] = FX2CMD_REG_WRITE; /* write register prefix */
3003 PVR2_DECOMPOSE_LE(hdw->cmd_buffer,1,data);
3004 hdw->cmd_buffer[5] = 0;
3005 hdw->cmd_buffer[6] = (reg >> 8) & 0xff;
3006 hdw->cmd_buffer[7] = reg & 0xff;
3009 ret = pvr2_send_request(hdw, hdw->cmd_buffer, 8, hdw->cmd_buffer, 0);
3011 LOCK_GIVE(hdw->ctl_lock);
3017 static int pvr2_read_register(struct pvr2_hdw *hdw, u16 reg, u32 *data)
3021 LOCK_TAKE(hdw->ctl_lock);
3023 hdw->cmd_buffer[0] = FX2CMD_REG_READ; /* read register prefix */
3024 hdw->cmd_buffer[1] = 0;
3025 hdw->cmd_buffer[2] = 0;
3026 hdw->cmd_buffer[3] = 0;
3027 hdw->cmd_buffer[4] = 0;
3028 hdw->cmd_buffer[5] = 0;
3029 hdw->cmd_buffer[6] = (reg >> 8) & 0xff;
3030 hdw->cmd_buffer[7] = reg & 0xff;
3032 ret |= pvr2_send_request(hdw, hdw->cmd_buffer, 8, hdw->cmd_buffer, 4);
3033 *data = PVR2_COMPOSE_LE(hdw->cmd_buffer,0);
3035 LOCK_GIVE(hdw->ctl_lock);
3041 static void pvr2_hdw_render_useless_unlocked(struct pvr2_hdw *hdw)
3043 if (!hdw->flag_ok) return;
3045 hdw->flag_ok = 0;
3046 if (hdw->vid_stream) {
3047 pvr2_stream_setup(hdw->vid_stream,NULL,0,0);
3049 hdw->flag_streaming_enabled = 0;
3050 hdw->subsys_enabled_mask = 0;
3054 void pvr2_hdw_render_useless(struct pvr2_hdw *hdw)
3056 LOCK_TAKE(hdw->ctl_lock);
3057 pvr2_hdw_render_useless_unlocked(hdw);
3058 LOCK_GIVE(hdw->ctl_lock);
3062 void pvr2_hdw_device_reset(struct pvr2_hdw *hdw)
3066 ret = usb_lock_device_for_reset(hdw->usb_dev,NULL);
3068 ret = usb_reset_device(hdw->usb_dev);
3069 usb_unlock_device(hdw->usb_dev);
3084 void pvr2_hdw_cpureset_assert(struct pvr2_hdw *hdw,int val)
3090 if (!hdw->usb_dev) return;
3098 pipe = usb_sndctrlpipe(hdw->usb_dev, 0);
3099 ret = usb_control_msg(hdw->usb_dev,pipe,0xa0,0x40,0xe600,0,da,1,HZ);
3103 pvr2_hdw_render_useless(hdw);
3108 int pvr2_hdw_cmd_deep_reset(struct pvr2_hdw *hdw)
3111 LOCK_TAKE(hdw->ctl_lock); do {
3113 hdw->flag_ok = !0;
3114 hdw->cmd_buffer[0] = FX2CMD_DEEP_RESET;
3115 status = pvr2_send_request(hdw,hdw->cmd_buffer,1,NULL,0);
3116 } while (0); LOCK_GIVE(hdw->ctl_lock);
3121 int pvr2_hdw_cmd_powerup(struct pvr2_hdw *hdw)
3124 LOCK_TAKE(hdw->ctl_lock); do {
3126 hdw->cmd_buffer[0] = FX2CMD_POWER_ON;
3127 status = pvr2_send_request(hdw,hdw->cmd_buffer,1,NULL,0);
3128 } while (0); LOCK_GIVE(hdw->ctl_lock);
3133 int pvr2_hdw_cmd_decoder_reset(struct pvr2_hdw *hdw)
3135 if (!hdw->decoder_ctrl) {
3141 if (!hdw->decoder_ctrl->force_reset) {
3149 hdw->decoder_ctrl->force_reset(hdw->decoder_ctrl->ctxt);
3155 static int pvr2_hdw_cmd_usbstream(struct pvr2_hdw *hdw,int runFl)
3158 LOCK_TAKE(hdw->ctl_lock); do {
3159 hdw->cmd_buffer[0] =
3161 status = pvr2_send_request(hdw,hdw->cmd_buffer,1,NULL,0);
3162 } while (0); LOCK_GIVE(hdw->ctl_lock);
3164 hdw->subsys_enabled_mask =
3165 ((hdw->subsys_enabled_mask &
3173 void pvr2_hdw_get_debug_info(const struct pvr2_hdw *hdw,
3176 ptr->big_lock_held = hdw->big_lock_held;
3177 ptr->ctl_lock_held = hdw->ctl_lock_held;
3178 ptr->flag_ok = hdw->flag_ok;
3179 ptr->flag_disconnected = hdw->flag_disconnected;
3180 ptr->flag_init_ok = hdw->flag_init_ok;
3181 ptr->flag_streaming_enabled = hdw->flag_streaming_enabled;
3182 ptr->subsys_flags = hdw->subsys_enabled_mask;
3183 ptr->cmd_debug_state = hdw->cmd_debug_state;
3184 ptr->cmd_code = hdw->cmd_debug_code;
3185 ptr->cmd_debug_write_len = hdw->cmd_debug_write_len;
3186 ptr->cmd_debug_read_len = hdw->cmd_debug_read_len;
3187 ptr->cmd_debug_timeout = hdw->ctl_timeout_flag;
3188 ptr->cmd_debug_write_pend = hdw->ctl_write_pend_flag;
3189 ptr->cmd_debug_read_pend = hdw->ctl_read_pend_flag;
3190 ptr->cmd_debug_rstatus = hdw->ctl_read_urb->status;
3191 ptr->cmd_debug_wstatus = hdw->ctl_read_urb->status;
3195 int pvr2_hdw_gpio_get_dir(struct pvr2_hdw *hdw,u32 *dp)
3197 return pvr2_read_register(hdw,PVR2_GPIO_DIR,dp);
3201 int pvr2_hdw_gpio_get_out(struct pvr2_hdw *hdw,u32 *dp)
3203 return pvr2_read_register(hdw,PVR2_GPIO_OUT,dp);
3207 int pvr2_hdw_gpio_get_in(struct pvr2_hdw *hdw,u32 *dp)
3209 return pvr2_read_register(hdw,PVR2_GPIO_IN,dp);
3213 int pvr2_hdw_gpio_chg_dir(struct pvr2_hdw *hdw,u32 msk,u32 val)
3218 ret = pvr2_read_register(hdw,PVR2_GPIO_DIR,&cval);
3230 return pvr2_write_register(hdw,PVR2_GPIO_DIR,nval);
3234 int pvr2_hdw_gpio_chg_out(struct pvr2_hdw *hdw,u32 msk,u32 val)
3239 ret = pvr2_read_register(hdw,PVR2_GPIO_OUT,&cval);
3250 return pvr2_write_register(hdw,PVR2_GPIO_OUT,nval);
3255 static int pvr2_hdw_get_eeprom_addr(struct pvr2_hdw *hdw)
3258 LOCK_TAKE(hdw->ctl_lock); do {
3259 hdw->cmd_buffer[0] = FX2CMD_GET_EEPROM_ADDR;
3260 result = pvr2_send_request(hdw,
3261 hdw->cmd_buffer,1,
3262 hdw->cmd_buffer,1);
3264 result = hdw->cmd_buffer[0];
3265 } while(0); LOCK_GIVE(hdw->ctl_lock);
3270 int pvr2_hdw_register_access(struct pvr2_hdw *hdw,
3287 mutex_lock(&hdw->i2c_list_lock); do {
3288 list_for_each(item,&hdw->i2c_clients) {
3302 } while (0); mutex_unlock(&hdw->i2c_list_lock);