Lines Matching refs:mchip_dev
124 if (dma_set_mask(&meye.mchip_dev->dev, DMA_32BIT_MASK))
127 meye.mchip_ptable_toc = dma_alloc_coherent(&meye.mchip_dev->dev,
139 meye.mchip_ptable[i] = dma_alloc_coherent(&meye.mchip_dev->dev,
148 dma_free_coherent(&meye.mchip_dev->dev,
153 dma_free_coherent(&meye.mchip_dev->dev,
176 dma_free_coherent(&meye.mchip_dev->dev,
183 dma_free_coherent(&meye.mchip_dev->dev,
1142 sprintf(cap->bus_info, "PCI:%s", pci_name(meye.mchip_dev));
1765 pci_write_config_word(meye.mchip_dev, MCHIP_PCI_SOFTRESET_SET, 1);
1795 if (meye.mchip_dev != NULL) {
1800 meye.mchip_dev = pcidev;
1830 meye.video_dev->dev = &meye.mchip_dev->dev;
1840 if ((ret = pci_enable_device(meye.mchip_dev))) {
1845 mchip_adr = pci_resource_start(meye.mchip_dev,0);
1850 if (!request_mem_region(pci_resource_start(meye.mchip_dev, 0),
1851 pci_resource_len(meye.mchip_dev, 0),
1869 pci_read_config_byte(meye.mchip_dev, PCI_REVISION_ID, &revision);
1870 pci_write_config_byte(meye.mchip_dev, PCI_CACHE_LINE_SIZE, 8);
1871 pci_write_config_byte(meye.mchip_dev, PCI_LATENCY_TIMER, 64);
1873 pci_set_master(meye.mchip_dev);
1876 pci_write_config_word(meye.mchip_dev, MCHIP_PCI_SOFTRESET_SET, 1);
1932 release_mem_region(pci_resource_start(meye.mchip_dev, 0),
1933 pci_resource_len(meye.mchip_dev, 0));
1935 pci_disable_device(meye.mchip_dev);
1965 release_mem_region(pci_resource_start(meye.mchip_dev, 0),
1966 pci_resource_len(meye.mchip_dev, 0));
1968 pci_disable_device(meye.mchip_dev);