Lines Matching refs:cs
63 static void Amd7930_new_ph(struct IsdnCardState *cs);
101 WriteWordAmd7930(struct IsdnCardState *cs, BYTE reg, WORD val)
103 wByteAMD(cs, 0x00, reg);
104 wByteAMD(cs, 0x01, LOBYTE(val));
105 wByteAMD(cs, 0x01, HIBYTE(val));
109 ReadWordAmd7930(struct IsdnCardState *cs, BYTE reg)
114 res = rByteAMD(cs, reg);
115 res += 256*rByteAMD(cs, reg);
119 wByteAMD(cs, 0x00, reg);
120 res = rByteAMD(cs, 0x01);
121 res += 256*rByteAMD(cs, 0x01);
128 Amd7930_ph_command(struct IsdnCardState *cs, u_char command, char *s)
130 if (cs->debug & L1_DEB_ISAC)
131 debugl1(cs, "AMD7930: %s: ph_command 0x%02X", s, command);
133 cs->dc.amd7930.lmr1 = command;
134 wByteAMD(cs, 0xA3, command);
159 Amd7930_get_state(struct IsdnCardState *cs) {
160 BYTE lsr = rByteAMD(cs, 0xA1);
161 cs->dc.amd7930.ph_state = (lsr & 0x7) + 2;
162 Amd7930_new_ph(cs);
168 Amd7930_new_ph(struct IsdnCardState *cs)
170 u_char index = stateHelper[cs->dc.amd7930.old_state]*8 + stateHelper[cs->dc.amd7930.ph_state]-1;
173 if (cs->debug & L1_DEB_ISAC)
174 debugl1(cs, "AMD7930: new_ph %d, old_ph %d, message %d, index %d",
175 cs->dc.amd7930.ph_state, cs->dc.amd7930.old_state, message & 0x0f, index);
177 cs->dc.amd7930.old_state = cs->dc.amd7930.ph_state;
180 if ((message & 0xf0) && (cs->tx_skb)) {
181 wByteAMD(cs, 0x21, 0xC2);
182 wByteAMD(cs, 0x21, 0x02);
188 l1_msg(cs, HW_RESET | INDICATION, NULL);
189 Amd7930_get_state(cs);
192 l1_msg(cs, HW_DEACTIVATE | CONFIRM, NULL);
195 l1_msg(cs, HW_DEACTIVATE | INDICATION, NULL);
198 l1_msg(cs, HW_POWERUP | CONFIRM, NULL);
199 Amd7930_ph_command(cs, 0x50, "HW_ENABLE REQUEST");
202 l1_msg(cs, HW_RSYNC | INDICATION, NULL);
205 l1_msg(cs, HW_INFO4_P8 | INDICATION, NULL);
208 l1_msg(cs, HW_RSYNC | INDICATION, NULL);
209 l1_msg(cs, HW_INFO4_P8 | INDICATION, NULL);
212 l1_msg(cs, HW_POWERUP | CONFIRM, NULL);
215 Amd7930_ph_command(cs, 0x40, "HW_ENABLE REQ cleared if set");
216 l1_msg(cs, HW_RSYNC | INDICATION, NULL);
217 l1_msg(cs, HW_INFO2 | INDICATION, NULL);
218 l1_msg(cs, HW_INFO4_P8 | INDICATION, NULL);
221 Amd7930_ph_command(cs, 0x40, "T3 expired, HW_ENABLE REQ cleared");
222 cs->dc.amd7930.old_state = 3;
225 l1_msg(cs, HW_INFO2 | INDICATION, NULL);
237 struct IsdnCardState *cs =
241 if (!cs)
243 if (test_and_clear_bit(D_CLEARBUSY, &cs->event)) {
244 if (cs->debug)
245 debugl1(cs, "Amd7930: bh, D-Channel Busy cleared");
246 stptr = cs->stlist;
252 if (test_and_clear_bit(D_L1STATECHANGE, &cs->event)) {
253 if (cs->debug & L1_DEB_ISAC)
254 debugl1(cs, "AMD7930: bh, D_L1STATECHANGE");
255 Amd7930_new_ph(cs);
258 if (test_and_clear_bit(D_RCVBUFREADY, &cs->event)) {
259 if (cs->debug & L1_DEB_ISAC)
260 debugl1(cs, "AMD7930: bh, D_RCVBUFREADY");
261 DChannel_proc_rcv(cs);
264 if (test_and_clear_bit(D_XMTBUFREADY, &cs->event)) {
265 if (cs->debug & L1_DEB_ISAC)
266 debugl1(cs, "AMD7930: bh, D_XMTBUFREADY");
267 DChannel_proc_xmt(cs);
272 Amd7930_empty_Dfifo(struct IsdnCardState *cs, int flag)
280 if ((cs->debug & L1_DEB_ISAC) && !(cs->debug & L1_DEB_ISAC_FIFO))
281 debugl1(cs, "Amd7930: empty_Dfifo");
284 ptr = cs->rcvbuf + cs->rcvidx;
287 AmdIrqOff(cs);
290 stat = rByteAMD(cs, 0x07); // DSR2
293 while ( (stat & 2) && ((ptr-cs->rcvbuf) < MAX_DFRAME_LEN_L1) ) {
294 *ptr = rByteAMD(cs, 0x04); // DCRB
296 stat = rByteAMD(cs, 0x07); // DSR2
297 cs->rcvidx = ptr - cs->rcvbuf;
302 der = rWordAMD(cs, 0x03);
306 rWordAMD(cs, 0x89); // clear DRCR
308 if ((cs->rcvidx) > 0) {
309 if (!(skb = alloc_skb(cs->rcvidx, GFP_ATOMIC)))
313 if (cs->debug & L1_DEB_ISAC_FIFO) {
314 char *t = cs->dlog;
316 t += sprintf(t, "Amd7930: empty_Dfifo cnt: %d |", cs->rcvidx);
317 QuickHex(t, cs->rcvbuf, cs->rcvidx);
318 debugl1(cs, cs->dlog);
321 memcpy(skb_put(skb, cs->rcvidx), cs->rcvbuf, cs->rcvidx);
322 skb_queue_tail(&cs->rq, skb);
328 ptr = cs->rcvbuf;
329 cs->rcvidx = 0;
330 schedule_event(cs, D_RCVBUFREADY);
334 if(cs->rcvidx >= MAX_DFRAME_LEN_L1) {
335 if (cs->debug & L1_DEB_WARN)
336 debugl1(cs, "AMD7930: empty_Dfifo L2-Framelength overrun");
337 cs->rcvidx = 0;
341 AmdIrqOn(cs);
346 Amd7930_fill_Dfifo(struct IsdnCardState *cs)
353 if ((cs->debug & L1_DEB_ISAC) && !(cs->debug & L1_DEB_ISAC_FIFO))
354 debugl1(cs, "Amd7930: fill_Dfifo");
356 if ((!cs->tx_skb) || (cs->tx_skb->len <= 0))
360 if(!cs->dc.amd7930.tx_xmtlen)
362 len = dtcrw = cs->tx_skb->len;
364 else len = cs->dc.amd7930.tx_xmtlen;
368 AmdIrqOff(cs);
370 deb_ptr = ptr = cs->tx_skb->data;
374 while((txstat & 0x10) && (cs->tx_cnt < len)) {
375 wByteAMD(cs, 0x04, *ptr);
377 cs->tx_cnt++;
378 txstat= rByteAMD(cs, 0x07);
380 count = ptr - cs->tx_skb->data;
381 skb_pull(cs->tx_skb, count);
384 dtcrr = rWordAMD(cs, 0x85); // DTCR
385 dmr3 = rByteAMD(cs, 0x8E);
387 if (cs->debug & L1_DEB_ISAC) {
388 debugl1(cs, "Amd7930: fill_Dfifo, DMR3: 0x%02X, DTCR read: 0x%04X write: 0x%02X 0x%02X", dmr3, dtcrr, LOBYTE(dtcrw), HIBYTE(dtcrw));
392 if(!cs->dc.amd7930.tx_xmtlen) {
393 wWordAMD(cs, 0x85, dtcrw);
394 cs->dc.amd7930.tx_xmtlen = dtcrw;
397 if (test_and_set_bit(FLG_DBUSY_TIMER, &cs->HW_Flags)) {
398 debugl1(cs, "Amd7930: fill_Dfifo dbusytimer running");
399 del_timer(&cs->dbusytimer);
401 init_timer(&cs->dbusytimer);
402 cs->dbusytimer.expires = jiffies + ((DBUSY_TIMER_VALUE * HZ) / 1000);
403 add_timer(&cs->dbusytimer);
405 if (cs->debug & L1_DEB_ISAC_FIFO) {
406 char *t = cs->dlog;
410 debugl1(cs, cs->dlog);
413 AmdIrqOn(cs);
417 void Amd7930_interrupt(struct IsdnCardState *cs, BYTE irflags)
425 dsr1 = rByteAMD(cs, 0x02);
426 der = rWordAMD(cs, 0x03);
427 dsr2 = rByteAMD(cs, 0x07);
428 lsr = rByteAMD(cs, 0xA1);
430 if (cs->debug & L1_DEB_ISAC)
431 debugl1(cs, "Amd7930: interrupt: flags: 0x%02X, DSR1: 0x%02X, DSR2: 0x%02X, LSR: 0x%02X, DER=0x%04X", irflags, dsr1, dsr2, lsr, der);
436 if (cs->debug & L1_DEB_WARN)
437 debugl1(cs, "Amd7930: interrupt: D error DER=0x%04X", der);
441 wByteAMD(cs, 0x21, 0xC2);
442 wByteAMD(cs, 0x21, 0x02);
443 if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags))
444 del_timer(&cs->dbusytimer);
445 if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags))
446 schedule_event(cs, D_CLEARBUSY);
448 if (cs->tx_skb) {
449 skb_push(cs->tx_skb, cs->tx_cnt);
450 cs->tx_cnt = 0;
451 cs->dc.amd7930.tx_xmtlen = 0;
452 Amd7930_fill_Dfifo(cs);
455 debugl1(cs, "Amd7930: interrupt: D-Collision, no skb");
459 Amd7930_empty_Dfifo(cs, 1);
461 if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags))
462 del_timer(&cs->dbusytimer);
463 if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags))
464 schedule_event(cs, D_CLEARBUSY);
466 if (cs->tx_skb) {
467 skb_push(cs->tx_skb, cs->tx_cnt);
468 cs->tx_cnt = 0;
469 cs->dc.amd7930.tx_xmtlen = 0;
470 Amd7930_fill_Dfifo(cs);
476 if (cs->debug & L1_DEB_ISAC)
477 debugl1(cs, "Amd7930: interrupt: clear Timer and fill D-TX-FIFO if data");
480 AmdIrqOff(cs);
482 if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags))
483 del_timer(&cs->dbusytimer);
484 if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags))
485 schedule_event(cs, D_CLEARBUSY);
486 if (cs->tx_skb) {
487 if (cs->tx_skb->len)
488 Amd7930_fill_Dfifo(cs);
491 AmdIrqOn(cs);
497 if (cs->debug & L1_DEB_ISAC)
498 debugl1(cs, "Amd7930: interrupt: empty D-FIFO");
499 Amd7930_empty_Dfifo(cs, 0);
505 if (cs->debug & L1_DEB_ISAC) {
506 debugl1(cs, "Amd7930: interrupt: transmit packet ready");
509 AmdIrqOff(cs);
511 if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags))
512 del_timer(&cs->dbusytimer);
513 if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags))
514 schedule_event(cs, D_CLEARBUSY);
516 if (cs->tx_skb) {
517 if (cs->debug & L1_DEB_ISAC)
518 debugl1(cs, "Amd7930: interrupt: TX-Packet ready, freeing skb");
519 dev_kfree_skb_irq(cs->tx_skb);
520 cs->tx_cnt = 0;
521 cs->dc.amd7930.tx_xmtlen=0;
522 cs->tx_skb = NULL;
524 if ((cs->tx_skb = skb_dequeue(&cs->sq))) {
525 if (cs->debug & L1_DEB_ISAC)
526 debugl1(cs, "Amd7930: interrupt: TX-Packet ready, next packet dequeued");
527 cs->tx_cnt = 0;
528 cs->dc.amd7930.tx_xmtlen=0;
529 Amd7930_fill_Dfifo(cs);
532 schedule_event(cs, D_XMTBUFREADY);
534 AmdIrqOn(cs);
540 AmdIrqOff(cs);
542 if (cs->debug & L1_DEB_ISAC)
543 debugl1(cs, "Amd: interrupt: LSR=0x%02X, LIU is in state %d", lsr, ((lsr & 0x7) +2));
545 cs->dc.amd7930.ph_state = (lsr & 0x7) + 2;
547 schedule_event(cs, D_L1STATECHANGE);
549 AmdIrqOn(cs);
553 irflags = rByteAMD(cs, 0x00);
561 struct IsdnCardState *cs = (struct IsdnCardState *) st->l1.hardware;
565 if (cs->debug & L1_DEB_ISAC)
566 debugl1(cs, "Amd7930: l1hw called, pr: 0x%04X", pr);
570 if (cs->debug & DEB_DLOG_HEX)
571 LogFrame(cs, skb->data, skb->len);
572 if (cs->debug & DEB_DLOG_VERBOSE)
573 dlogframe(cs, skb, 0);
574 spin_lock_irqsave(&cs->lock, flags);
575 if (cs->tx_skb) {
576 skb_queue_tail(&cs->sq, skb);
578 if (cs->debug & L1_DEB_LAPD)
579 Logl2Frame(cs, skb, "Amd7930: l1hw: PH_DATA Queued", 0);
582 cs->tx_skb = skb;
583 cs->tx_cnt = 0;
584 cs->dc.amd7930.tx_xmtlen=0;
586 if (cs->debug & L1_DEB_LAPD)
587 Logl2Frame(cs, skb, "Amd7930: l1hw: PH_DATA", 0);
589 Amd7930_fill_Dfifo(cs);
591 spin_unlock_irqrestore(&cs->lock, flags);
594 spin_lock_irqsave(&cs->lock, flags);
595 if (cs->tx_skb) {
596 if (cs->debug & L1_DEB_WARN)
597 debugl1(cs, "Amd7930: l1hw: l2l1 tx_skb exist this shouldn't happen");
598 skb_queue_tail(&cs->sq, skb);
601 if (cs->debug & DEB_DLOG_HEX)
602 LogFrame(cs, skb->data, skb->len);
603 if (cs->debug & DEB_DLOG_VERBOSE)
604 dlogframe(cs, skb, 0);
605 cs->tx_skb = skb;
606 cs->tx_cnt = 0;
607 cs->dc.amd7930.tx_xmtlen=0;
609 if (cs->debug & L1_DEB_LAPD)
610 Logl2Frame(cs, skb, "Amd7930: l1hw: PH_DATA_PULLED", 0);
612 Amd7930_fill_Dfifo(cs);
613 spin_unlock_irqrestore(&cs->lock, flags);
617 if (cs->debug & L1_DEB_LAPD)
618 debugl1(cs, "Amd7930: l1hw: -> PH_REQUEST_PULL, skb: %s", (cs->tx_skb)? "yes":"no");
620 if (!cs->tx_skb) {
627 spin_lock_irqsave(&cs->lock, flags);
628 if ((cs->dc.amd7930.ph_state == 8)) {
631 Amd7930_ph_command(cs, 0x20, "HW_RESET REQEST"); //LMR1 bit 5
632 spin_unlock_irqrestore(&cs->lock, flags);
634 Amd7930_ph_command(cs, 0x40, "HW_RESET REQUEST");
635 cs->dc.amd7930.ph_state = 2;
636 spin_unlock_irqrestore(&cs->lock, flags);
637 Amd7930_new_ph(cs);
641 cs->dc.amd7930.ph_state = 9;
642 Amd7930_new_ph(cs);
651 skb_queue_purge(&cs->rq);
652 skb_queue_purge(&cs->sq);
653 if (cs->tx_skb) {
654 dev_kfree_skb(cs->tx_skb);
655 cs->tx_skb = NULL;
657 if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags))
658 del_timer(&cs->dbusytimer);
659 if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags))
660 schedule_event(cs, D_CLEARBUSY);
663 if (cs->debug & L1_DEB_WARN)
664 debugl1(cs, "Amd7930: l1hw: unknown %04x", pr);
670 setstack_Amd7930(struct PStack *st, struct IsdnCardState *cs)
673 if (cs->debug & L1_DEB_ISAC)
674 debugl1(cs, "Amd7930: setstack called");
681 DC_Close_Amd7930(struct IsdnCardState *cs) {
682 if (cs->debug & L1_DEB_ISAC)
683 debugl1(cs, "Amd7930: DC_Close called");
688 dbusy_timer_handler(struct IsdnCardState *cs)
696 if (cs->debug & L1_DEB_ISAC)
697 debugl1(cs, "Amd7930: dbusy_timer expired!");
699 if (test_bit(FLG_DBUSY_TIMER, &cs->HW_Flags)) {
700 spin_lock_irqsave(&cs->lock, flags);
703 dtcr = rWordAMD(cs, 0x85);
704 dsr1 = rByteAMD(cs, 0x02);
705 dsr2 = rByteAMD(cs, 0x07);
706 der = rWordAMD(cs, 0x03);
708 if (cs->debug & L1_DEB_ISAC)
709 debugl1(cs, "Amd7930: dbusy_timer_handler: DSR1=0x%02X, DSR2=0x%02X, DER=0x%04X, cs->tx_skb->len=%u, tx_stat=%u, dtcr=%u, cs->tx_cnt=%u", dsr1, dsr2, der, cs->tx_skb->len, cs->dc.amd7930.tx_xmtlen, dtcr, cs->tx_cnt);
711 if ((cs->dc.amd7930.tx_xmtlen - dtcr) < cs->tx_cnt) { /* D-Channel Busy */
712 test_and_set_bit(FLG_L1_DBUSY, &cs->HW_Flags);
713 stptr = cs->stlist;
714 spin_unlock_irqrestore(&cs->lock, flags);
722 test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags);
723 if (cs->tx_skb) {
724 dev_kfree_skb_any(cs->tx_skb);
725 cs->tx_cnt = 0;
726 cs->tx_skb = NULL;
727 cs->dc.amd7930.tx_xmtlen = 0;
730 debugl1(cs, "Amd7930: D-Channel Busy no skb");
734 wByteAMD(cs, 0x21, 0x82);
735 wByteAMD(cs, 0x21, 0x02);
736 spin_unlock_irqrestore(&cs->lock, flags);
737 cs->irq_func(cs->irq, cs);
739 if (cs->debug & L1_DEB_ISAC)
740 debugl1(cs, "Amd7930: dbusy_timer_handler: Transmitter reset");
748 Amd7930_init(struct IsdnCardState *cs)
753 if (cs->debug & L1_DEB_ISAC)
754 debugl1(cs, "Amd7930: initamd called");
756 cs->dc.amd7930.tx_xmtlen = 0;
757 cs->dc.amd7930.old_state = 0;
758 cs->dc.amd7930.lmr1 = 0x40;
759 cs->dc.amd7930.ph_command = Amd7930_ph_command;
760 cs->setstack_d = setstack_Amd7930;
761 cs->DC_Close = DC_Close_Amd7930;
771 rByteAMD(cs, cmd);
773 wByteAMD(cs, 0x00, cmd);
775 rByteAMD(cs, 0x01);
780 wByteAMD(cs, cmd, LOBYTE(*ptr++));
783 wByteAMD(cs, 0x00, cmd);
785 wByteAMD(cs, 0x01, LOBYTE(*ptr++));
791 setup_Amd7930(struct IsdnCardState *cs)
793 INIT_WORK(&cs->tqueue, Amd7930_bh);
794 cs->dbusytimer.function = (void *) dbusy_timer_handler;
795 cs->dbusytimer.data = (long) cs;
796 init_timer(&cs->dbusytimer);