Lines Matching refs:csr
166 struct csr1212_csr *csr;
168 csr = CSR1212_MALLOC(sizeof(*csr));
169 if (!csr)
172 csr->cache_head =
175 if (!csr->cache_head) {
176 CSR1212_FREE(csr);
183 csr->root_kv = csr1212_new_directory(CSR1212_KV_ID_VENDOR);
184 if (!csr->root_kv) {
185 CSR1212_FREE(csr->cache_head);
186 CSR1212_FREE(csr);
190 csr->bus_info_data = csr->cache_head->data;
191 csr->bus_info_len = bus_info_size;
192 csr->crc_len = bus_info_size;
193 csr->ops = ops;
194 csr->private = private;
195 csr->cache_tail = csr->cache_head;
197 return csr;
200 void csr1212_init_local_csr(struct csr1212_csr *csr,
206 csr->max_rom = mr_map[max_rom];
207 memcpy(csr->bus_info_data, bus_info_data, csr->bus_info_len);
547 void csr1212_destroy_csr(struct csr1212_csr *csr)
552 csr1212_release_keyval(csr->root_kv);
554 c = csr->cache_head;
567 CSR1212_FREE(csr);
573 static int csr1212_append_new_cache(struct csr1212_csr *csr, size_t romsize)
578 BUG_ON(!csr || !csr->ops || !csr->ops->allocate_addr_range ||
579 !csr->ops->release_addr || csr->max_rom < 1);
581 /* ROM size must be a multiple of csr->max_rom */
582 romsize = (romsize + (csr->max_rom - 1)) & ~(csr->max_rom - 1);
584 csr_addr = csr->ops->allocate_addr_range(romsize, csr->max_rom,
585 csr->private);
591 csr->ops->release_addr(csr_addr, csr->private);
598 csr->ops->release_addr(csr_addr, csr->private);
605 csr->ops->release_addr(csr_addr, csr->private);
610 if (csr1212_attach_keyval_to_directory(csr->root_kv, cache->ext_rom) !=
613 csr->ops->release_addr(csr_addr, csr->private);
622 cache->prev = csr->cache_tail;
623 csr->cache_tail->next = cache;
624 csr->cache_tail = cache;
628 static void csr1212_remove_cache(struct csr1212_csr *csr,
631 if (csr->cache_head == cache)
632 csr->cache_head = cache->next;
633 if (csr->cache_tail == cache)
634 csr->cache_tail = cache->prev;
642 csr1212_detach_keyval_from_directory(csr->root_kv,
928 int csr1212_generate_csr_image(struct csr1212_csr *csr)
937 BUG_ON(!csr);
939 cache = csr->cache_head;
943 bi->length = bytes_to_quads(csr->bus_info_len) - 1;
947 csr->root_kv->next = NULL;
948 csr->root_kv->prev = NULL;
950 agg_size = csr1212_generate_layout_order(csr->root_kv);
952 init_offset = csr->bus_info_len;
954 for (kv = csr->root_kv, cache = csr->cache_head;
967 ret = csr1212_append_new_cache(csr,
973 agg_size = csr1212_generate_layout_order(csr->root_kv);
974 kv = csr->root_kv;
975 cache = csr->cache_head;
976 init_offset = csr->bus_info_len;
988 csr1212_remove_cache(csr, oc);
993 for (cache = csr->cache_tail; cache; cache = cache->prev) {
1000 BUG_ON(csr->max_rom < 1);
1001 leaf_size = (cache->len + (csr->max_rom - 1)) &
1002 ~(csr->max_rom - 1);
1023 if (cache != csr->cache_head) {
1037 int csr1212_read(struct csr1212_csr *csr, u32 offset, void *buffer, u32 len)
1041 for (cache = csr->cache_head; cache; cache = cache->next)
1056 static int csr1212_parse_bus_info_block(struct csr1212_csr *csr)
1068 for (i = 0; i < csr->bus_info_len; i += sizeof(u32)) {
1069 ret = csr->ops->bus_read(csr, CSR1212_CONFIG_ROM_SPACE_BASE + i,
1070 sizeof(u32), &csr->cache_head->data[bytes_to_quads(i)],
1071 csr->private);
1077 be32_to_cpu(csr->cache_head->data[0]) >> 24 !=
1078 bytes_to_quads(csr->bus_info_len) - 1)
1082 bi = (struct csr1212_bus_info_block_img*)csr->cache_head->data;
1083 csr->crc_len = quads_to_bytes(bi->crc_length);
1088 for (i = csr->bus_info_len; i <= csr->crc_len; i += sizeof(u32)) {
1089 ret = csr->ops->bus_read(csr, CSR1212_CONFIG_ROM_SPACE_BASE + i,
1090 sizeof(u32), &csr->cache_head->data[bytes_to_quads(i)],
1091 csr->private);
1109 cr->offset_end = csr->crc_len + 4;
1111 csr->cache_head->filled_head = cr;
1112 csr->cache_head->filled_tail = cr;
1249 csr1212_read_keyval(struct csr1212_csr *csr, struct csr1212_keyval *kv)
1259 BUG_ON(!csr || !kv || csr->max_rom < 1);
1263 for (cache = csr->cache_head; cache; cache = cache->next)
1275 if (csr->ops->bus_read(csr,
1277 sizeof(u32), &q, csr->private))
1283 (csr->max_rom - 1)) & ~(csr->max_rom - 1);
1290 csr->cache_tail->next = cache;
1291 cache->prev = csr->cache_tail;
1293 csr->cache_tail = cache;
1320 newcr->offset_start = cache_index & ~(csr->max_rom - 1);
1344 newcr->offset_start = cache_index & ~(csr->max_rom - 1);
1355 ~(csr->max_rom - 1))];
1358 cr->offset_end) & ~(csr->max_rom - 1);
1360 if (csr->ops->bus_read(csr, addr, csr->max_rom, cache_ptr,
1361 csr->private)) {
1362 if (csr->max_rom == 4)
1368 csr->max_rom = 4;
1372 cr->offset_end += csr->max_rom - (cr->offset_end &
1373 (csr->max_rom - 1));
1409 csr1212_get_keyval(struct csr1212_csr *csr, struct csr1212_keyval *kv)
1414 if (csr1212_read_keyval(csr, kv) != CSR1212_SUCCESS)
1419 int csr1212_parse_csr(struct csr1212_csr *csr)
1425 BUG_ON(!csr || !csr->ops || !csr->ops->bus_read);
1427 ret = csr1212_parse_bus_info_block(csr);
1431 if (!csr->ops->get_max_rom) {
1432 csr->max_rom = mr_map[0]; /* default value */
1434 int i = csr->ops->get_max_rom(csr->bus_info_data,
1435 csr->private);
1438 csr->max_rom = mr_map[i];
1441 csr->cache_head->layout_head = csr->root_kv;
1442 csr->cache_head->layout_tail = csr->root_kv;
1444 csr->root_kv->offset = (CSR1212_CONFIG_ROM_SPACE_BASE & 0xffff) +
1445 csr->bus_info_len;
1447 csr->root_kv->valid = 0;
1448 csr->root_kv->next = csr->root_kv;
1449 csr->root_kv->prev = csr->root_kv;
1450 ret = csr1212_read_keyval(csr, csr->root_kv);
1456 for (dentry = csr->root_kv->value.directory.dentries_head;
1460 ret = csr1212_read_keyval(csr, dentry->kv);