Lines Matching refs:CCR1
281 #define CCR1 0x2d
3174 /* CCR1
3185 write_reg(info, CHB + CCR1, 0x17);
3230 /* CCR1:02..00 CM[2..0] Clock Mode = 111 (clock mode 7) */
3231 val = read_reg(info, CHA + CCR1) | (BIT2 + BIT1 + BIT0);
3232 write_reg(info, CHA + CCR1, val);
3333 /* CCR1
3345 write_reg(info, CHA + CCR1, val);
3663 /* CCR1
3672 write_reg(info, CHA + CCR1, 0x1f);
3795 set_reg_bits(info, CHA + CCR1, BIT3);
3797 clear_reg_bits(info, CHA + CCR1, BIT3);