Lines Matching refs:BIT0
315 #define IRQ_RXFIFO BIT0 // receive pool full
323 #define PVR_DTR BIT0
753 #define CMD_TXRESET BIT0 // transmit reset
1255 if (gis & (BIT1 + BIT0)) {
3231 val = read_reg(info, CHA + CCR1) | (BIT2 + BIT1 + BIT0);
3245 val = read_reg(info, CHA + MODE) | BIT0;
3298 val |= BIT0;
3368 val |= BIT0;
3644 val |= BIT0;
3722 val |= BIT0; /* 7 bits */