Lines Matching defs:dev_priv
86 drm_r128_private_t *dev_priv = dev->dev_private;
93 static void r128_status(drm_r128_private_t * dev_priv)
114 static int r128_do_pixcache_flush(drm_r128_private_t * dev_priv)
122 for (i = 0; i < dev_priv->usec_timeout; i++) {
135 static int r128_do_wait_for_fifo(drm_r128_private_t * dev_priv, int entries)
139 for (i = 0; i < dev_priv->usec_timeout; i++) {
152 static int r128_do_wait_for_idle(drm_r128_private_t * dev_priv)
156 ret = r128_do_wait_for_fifo(dev_priv, 64);
160 for (i = 0; i < dev_priv->usec_timeout; i++) {
162 r128_do_pixcache_flush(dev_priv);
179 static void r128_cce_load_microcode(drm_r128_private_t * dev_priv)
185 r128_do_wait_for_idle(dev_priv);
199 static void r128_do_cce_flush(drm_r128_private_t * dev_priv)
209 int r128_do_cce_idle(drm_r128_private_t * dev_priv)
213 for (i = 0; i < dev_priv->usec_timeout; i++) {
214 if (GET_RING_HEAD(dev_priv) == dev_priv->ring.tail) {
217 dev_priv->cce_fifo_size) &&
220 return r128_do_pixcache_flush(dev_priv);
228 r128_status(dev_priv);
235 static void r128_do_cce_start(drm_r128_private_t * dev_priv)
237 r128_do_wait_for_idle(dev_priv);
240 dev_priv->cce_mode | dev_priv->ring.size_l2qw
245 dev_priv->cce_running = 1;
252 static void r128_do_cce_reset(drm_r128_private_t * dev_priv)
256 dev_priv->ring.tail = 0;
263 static void r128_do_cce_stop(drm_r128_private_t * dev_priv)
269 dev_priv->cce_running = 0;
276 drm_r128_private_t *dev_priv = dev->dev_private;
279 r128_do_pixcache_flush(dev_priv);
300 r128_do_cce_reset(dev_priv);
303 dev_priv->cce_running = 0;
312 drm_r128_private_t * dev_priv)
323 if (!dev_priv->is_pci)
324 ring_start = dev_priv->cce_ring->offset - dev->agp->base;
327 ring_start = dev_priv->cce_ring->offset -
352 drm_r128_private_t *dev_priv;
356 dev_priv = drm_alloc(sizeof(drm_r128_private_t), DRM_MEM_DRIVER);
357 if (dev_priv == NULL)
360 memset(dev_priv, 0, sizeof(drm_r128_private_t));
362 dev_priv->is_pci = init->is_pci;
364 if (dev_priv->is_pci && !dev->sg) {
366 dev->dev_private = (void *)dev_priv;
371 dev_priv->usec_timeout = init->usec_timeout;
372 if (dev_priv->usec_timeout < 1 ||
373 dev_priv->usec_timeout > R128_MAX_USEC_TIMEOUT) {
375 dev->dev_private = (void *)dev_priv;
380 dev_priv->cce_mode = init->cce_mode;
384 atomic_set(&dev_priv->idle_count, 0);
395 dev->dev_private = (void *)dev_priv;
402 dev_priv->cce_fifo_size = 0;
406 dev_priv->cce_fifo_size = 192;
410 dev_priv->cce_fifo_size = 128;
417 dev_priv->cce_fifo_size = 64;
423 dev_priv->color_fmt = R128_DATATYPE_RGB565;
427 dev_priv->color_fmt = R128_DATATYPE_ARGB8888;
430 dev_priv->front_offset = init->front_offset;
431 dev_priv->front_pitch = init->front_pitch;
432 dev_priv->back_offset = init->back_offset;
433 dev_priv->back_pitch = init->back_pitch;
437 dev_priv->depth_fmt = R128_DATATYPE_RGB565;
442 dev_priv->depth_fmt = R128_DATATYPE_ARGB8888;
445 dev_priv->depth_offset = init->depth_offset;
446 dev_priv->depth_pitch = init->depth_pitch;
447 dev_priv->span_offset = init->span_offset;
449 dev_priv->front_pitch_offset_c = (((dev_priv->front_pitch / 8) << 21) |
450 (dev_priv->front_offset >> 5));
451 dev_priv->back_pitch_offset_c = (((dev_priv->back_pitch / 8) << 21) |
452 (dev_priv->back_offset >> 5));
453 dev_priv->depth_pitch_offset_c = (((dev_priv->depth_pitch / 8) << 21) |
454 (dev_priv->depth_offset >> 5) |
456 dev_priv->span_pitch_offset_c = (((dev_priv->depth_pitch / 8) << 21) |
457 (dev_priv->span_offset >> 5));
461 if (!dev_priv->sarea) {
463 dev->dev_private = (void *)dev_priv;
468 dev_priv->mmio = drm_core_findmap(dev, init->mmio_offset);
469 if (!dev_priv->mmio) {
471 dev->dev_private = (void *)dev_priv;
475 dev_priv->cce_ring = drm_core_findmap(dev, init->ring_offset);
476 if (!dev_priv->cce_ring) {
478 dev->dev_private = (void *)dev_priv;
482 dev_priv->ring_rptr = drm_core_findmap(dev, init->ring_rptr_offset);
483 if (!dev_priv->ring_rptr) {
485 dev->dev_private = (void *)dev_priv;
493 dev->dev_private = (void *)dev_priv;
498 if (!dev_priv->is_pci) {
499 dev_priv->agp_textures =
501 if (!dev_priv->agp_textures) {
503 dev->dev_private = (void *)dev_priv;
509 dev_priv->sarea_priv =
510 (drm_r128_sarea_t *) ((u8 *) dev_priv->sarea->handle +
514 if (!dev_priv->is_pci) {
515 drm_core_ioremap(dev_priv->cce_ring, dev);
516 drm_core_ioremap(dev_priv->ring_rptr, dev);
518 if (!dev_priv->cce_ring->handle ||
519 !dev_priv->ring_rptr->handle ||
522 dev->dev_private = (void *)dev_priv;
529 dev_priv->cce_ring->handle = (void *)dev_priv->cce_ring->offset;
530 dev_priv->ring_rptr->handle =
531 (void *)dev_priv->ring_rptr->offset;
537 if (!dev_priv->is_pci)
538 dev_priv->cce_buffers_offset = dev->agp->base;
541 dev_priv->cce_buffers_offset = (unsigned long)dev->sg->virtual;
543 dev_priv->ring.start = (u32 *) dev_priv->cce_ring->handle;
544 dev_priv->ring.end = ((u32 *) dev_priv->cce_ring->handle
546 dev_priv->ring.size = init->ring_size;
547 dev_priv->ring.size_l2qw = drm_order(init->ring_size / 8);
549 dev_priv->ring.tail_mask = (dev_priv->ring.size / sizeof(u32)) - 1;
551 dev_priv->ring.high_mark = 128;
553 dev_priv->sarea_priv->last_frame = 0;
554 R128_WRITE(R128_LAST_FRAME_REG, dev_priv->sarea_priv->last_frame);
556 dev_priv->sarea_priv->last_dispatch = 0;
557 R128_WRITE(R128_LAST_DISPATCH_REG, dev_priv->sarea_priv->last_dispatch);
560 if (dev_priv->is_pci) {
562 dev_priv->gart_info.gart_table_location = DRM_ATI_GART_MAIN;
563 dev_priv->gart_info.table_size = R128_PCIGART_TABLE_SIZE;
564 dev_priv->gart_info.addr = NULL;
565 dev_priv->gart_info.bus_addr = 0;
566 dev_priv->gart_info.gart_reg_if = DRM_ATI_GART_PCI;
567 if (!drm_ati_pcigart_init(dev, &dev_priv->gart_info)) {
569 dev->dev_private = (void *)dev_priv;
573 R128_WRITE(R128_PCI_GART_PAGE, dev_priv->gart_info.bus_addr);
578 r128_cce_init_ring_buffer(dev, dev_priv);
579 r128_cce_load_microcode(dev_priv);
581 dev->dev_private = (void *)dev_priv;
599 drm_r128_private_t *dev_priv = dev->dev_private;
602 if (!dev_priv->is_pci) {
603 if (dev_priv->cce_ring != NULL)
604 drm_core_ioremapfree(dev_priv->cce_ring, dev);
605 if (dev_priv->ring_rptr != NULL)
606 drm_core_ioremapfree(dev_priv->ring_rptr, dev);
614 if (dev_priv->gart_info.bus_addr)
616 &dev_priv->gart_info))
654 drm_r128_private_t *dev_priv = dev->dev_private;
659 if (dev_priv->cce_running || dev_priv->cce_mode == R128_PM4_NONPM4) {
664 r128_do_cce_start(dev_priv);
675 drm_r128_private_t *dev_priv = dev->dev_private;
689 r128_do_cce_flush(dev_priv);
696 ret = r128_do_cce_idle(dev_priv);
705 r128_do_cce_stop(dev_priv);
718 drm_r128_private_t *dev_priv = dev->dev_private;
723 if (!dev_priv) {
728 r128_do_cce_reset(dev_priv);
731 dev_priv->cce_running = 0;
739 drm_r128_private_t *dev_priv = dev->dev_private;
744 if (dev_priv->cce_running) {
745 r128_do_cce_flush(dev_priv);
748 return r128_do_cce_idle(dev_priv);
776 drm_r128_private_t *dev_priv = dev->dev_private;
789 for (t = 0; t < dev_priv->usec_timeout; t++) {
826 int r128_wait_ring(drm_r128_private_t * dev_priv, int n)
828 drm_r128_ring_buffer_t *ring = &dev_priv->ring;
831 for (i = 0; i < dev_priv->usec_timeout; i++) {
832 r128_update_ring_snapshot(dev_priv);