Lines Matching defs:dev_priv
92 drm_i810_private_t *dev_priv;
98 dev_priv = dev->dev_private;
99 buf = dev_priv->mmap_buffer;
128 drm_i810_private_t *dev_priv = dev->dev_private;
138 dev_priv->mmap_buffer = buf;
142 dev_priv->mmap_buffer = NULL;
218 drm_i810_private_t *dev_priv =
221 if (dev_priv->ring.virtual_start) {
222 drm_core_ioremapfree(&dev_priv->ring.map, dev);
224 if (dev_priv->hw_status_page) {
226 dev_priv->hw_status_page,
227 dev_priv->dma_status_page);
248 drm_i810_private_t *dev_priv = dev->dev_private;
249 drm_i810_ring_buffer_t *ring = &(dev_priv->ring);
281 drm_i810_private_t *dev_priv = dev->dev_private;
282 drm_i810_ring_buffer_t *ring = &(dev_priv->ring);
291 static int i810_freelist_init(drm_device_t * dev, drm_i810_private_t * dev_priv)
295 u32 *hw_status = (u32 *) (dev_priv->hw_status_page + my_idx);
327 drm_i810_private_t * dev_priv,
332 memset(dev_priv, 0, sizeof(drm_i810_private_t));
339 dev_priv->sarea_map = r_list->map;
343 if (!dev_priv->sarea_map) {
344 dev->dev_private = (void *)dev_priv;
349 dev_priv->mmio_map = drm_core_findmap(dev, init->mmio_offset);
350 if (!dev_priv->mmio_map) {
351 dev->dev_private = (void *)dev_priv;
359 dev->dev_private = (void *)dev_priv;
365 dev_priv->sarea_priv = (drm_i810_sarea_t *)
366 ((u8 *) dev_priv->sarea_map->handle + init->sarea_priv_offset);
368 dev_priv->ring.Start = init->ring_start;
369 dev_priv->ring.End = init->ring_end;
370 dev_priv->ring.Size = init->ring_size;
372 dev_priv->ring.map.offset = dev->agp->base + init->ring_start;
373 dev_priv->ring.map.size = init->ring_size;
374 dev_priv->ring.map.type = _DRM_AGP;
375 dev_priv->ring.map.flags = 0;
376 dev_priv->ring.map.mtrr = 0;
378 drm_core_ioremap(&dev_priv->ring.map, dev);
380 if (dev_priv->ring.map.handle == NULL) {
381 dev->dev_private = (void *)dev_priv;
388 dev_priv->ring.virtual_start = dev_priv->ring.map.handle;
390 dev_priv->ring.tail_mask = dev_priv->ring.Size - 1;
392 dev_priv->w = init->w;
393 dev_priv->h = init->h;
394 dev_priv->pitch = init->pitch;
395 dev_priv->back_offset = init->back_offset;
396 dev_priv->depth_offset = init->depth_offset;
397 dev_priv->front_offset = init->front_offset;
399 dev_priv->overlay_offset = init->overlay_offset;
400 dev_priv->overlay_physical = init->overlay_physical;
402 dev_priv->front_di1 = init->front_offset | init->pitch_bits;
403 dev_priv->back_di1 = init->back_offset | init->pitch_bits;
404 dev_priv->zi1 = init->depth_offset | init->pitch_bits;
407 dev_priv->hw_status_page =
409 &dev_priv->dma_status_page);
410 if (!dev_priv->hw_status_page) {
411 dev->dev_private = (void *)dev_priv;
416 memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
417 DRM_DEBUG("hw status page @ %p\n", dev_priv->hw_status_page);
419 I810_WRITE(0x02080, dev_priv->dma_status_page);
423 if (i810_freelist_init(dev, dev_priv) != 0) {
424 dev->dev_private = (void *)dev_priv;
430 dev->dev_private = (void *)dev_priv;
483 drm_i810_private_t *dev_priv;
503 dev_priv = drm_alloc(sizeof(drm_i810_private_t),
505 if (dev_priv == NULL)
507 retcode = i810_dma_initialize(dev, dev_priv, &init);
517 dev_priv = drm_alloc(sizeof(drm_i810_private_t),
519 if (dev_priv == NULL)
521 retcode = i810_dma_initialize(dev, dev_priv, &init);
542 drm_i810_private_t *dev_priv = dev->dev_private;
574 drm_i810_private_t *dev_priv = dev->dev_private;
608 drm_i810_private_t *dev_priv = dev->dev_private;
615 if (tmp == dev_priv->front_di1 || tmp == dev_priv->back_di1) {
620 tmp, dev_priv->front_di1, dev_priv->back_di1);
625 OUT_RING(dev_priv->zi1);
642 drm_i810_private_t *dev_priv = dev->dev_private;
643 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
675 drm_i810_private_t *dev_priv = dev->dev_private;
676 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
679 int pitch = dev_priv->pitch;
684 if (dev_priv->current_page == 1) {
708 pbox->x2 > dev_priv->w || pbox->y2 > dev_priv->h)
727 OUT_RING(dev_priv->back_offset + start);
738 OUT_RING(dev_priv->depth_offset + start);
748 drm_i810_private_t *dev_priv = dev->dev_private;
749 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
752 int pitch = dev_priv->pitch;
772 pbox->x2 > dev_priv->w || pbox->y2 > dev_priv->h)
779 if (dev_priv->current_page == 0)
780 OUT_RING(dev_priv->front_offset + start);
782 OUT_RING(dev_priv->back_offset + start);
784 if (dev_priv->current_page == 0)
785 OUT_RING(dev_priv->back_offset + start);
787 OUT_RING(dev_priv->front_offset + start);
795 drm_i810_private_t *dev_priv = dev->dev_private;
797 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
854 dev_priv->counter++;
862 OUT_RING(dev_priv->counter);
874 drm_i810_private_t *dev_priv = dev->dev_private;
875 int pitch = dev_priv->pitch;
880 dev_priv->current_page,
881 dev_priv->sarea_priv->pf_current_page);
896 if (dev_priv->current_page == 0) {
897 OUT_RING(dev_priv->back_offset);
898 dev_priv->current_page = 1;
900 OUT_RING(dev_priv->front_offset);
901 dev_priv->current_page = 0;
915 dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
921 drm_i810_private_t *dev_priv = dev->dev_private;
935 i810_wait_ring(dev, dev_priv->ring.Size - 8);
940 drm_i810_private_t *dev_priv = dev->dev_private;
954 i810_wait_ring(dev, dev_priv->ring.Size - 8);
1021 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1022 u32 *hw_status = dev_priv->hw_status_page;
1024 dev_priv->sarea_priv;
1045 sarea_priv->last_enqueue = dev_priv->counter - 1;
1093 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1094 u32 *hw_status = dev_priv->hw_status_page;
1096 dev_priv->sarea_priv;
1109 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1110 u32 *hw_status = dev_priv->hw_status_page;
1112 dev_priv->sarea_priv;
1150 drm_i810_private_t *dev_priv = dev->dev_private;
1152 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
1172 dev_priv->counter++;
1173 DRM_DEBUG("dispatch counter : %ld\n", dev_priv->counter);
1213 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1214 u32 *hw_status = dev_priv->hw_status_page;
1216 dev_priv->sarea_priv;
1232 sarea_priv->last_enqueue = dev_priv->counter - 1;
1243 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1245 return (int)(((u32 *) (dev_priv->hw_status_page))[4]);
1253 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1256 data.offset = dev_priv->overlay_offset;
1257 data.physical = dev_priv->overlay_physical;
1269 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1281 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1286 I810_WRITE(0x30000, dev_priv->overlay_physical | 0x80000000);
1295 drm_i810_private_t *dev_priv = dev->dev_private;
1298 dev_priv->page_flipping = 1;
1299 dev_priv->current_page = 0;
1300 dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
1305 drm_i810_private_t *dev_priv = dev->dev_private;
1308 if (dev_priv->current_page != 0)
1311 dev_priv->page_flipping = 0;
1320 drm_i810_private_t *dev_priv = dev->dev_private;
1326 if (!dev_priv->page_flipping)
1353 drm_i810_private_t *dev_priv = dev->dev_private;
1354 if (dev_priv->page_flipping) {