Lines Matching defs:timing
70 /* Now load the right timing register */
78 * cs5530_set_dmamode - DMA timing setup
90 u32 tuning, timing = 0;
98 timing = 0x00921250;break;
100 timing = 0x00911140;break;
102 timing = 0x00911030;break;
104 timing = 0x00077771;break;
106 timing = 0x00012121;break;
108 timing = 0x00002020;break;
113 timing |= (tuning & 0x80000000UL);
115 iowrite32(timing, base + 0x04);
117 if (timing & 0x00100000)
122 iowrite32(timing, base + 0x0C);