Lines Matching refs:RT
294 equal the RT field. */
321 instruction or the RT field in a D, DS, X, XFX or XO form
324 #define RT (RS)
760 equal the RT field. */
990 /* An X_MASK with the RT field fixed. */
996 /* An X_MASK with the RT and RA fields fixed. */
1206 { "mulli", OP(7), OP_MASK, PPC, { RT, RA, SI } },
1207 { "muli", OP(7), OP_MASK, POWER, { RT, RA, SI } },
1209 { "subfic", OP(8), OP_MASK, PPC, { RT, RA, SI } },
1210 { "sfi", OP(8), OP_MASK, POWER, { RT, RA, SI } },
1212 { "dozi", OP(9), OP_MASK, POWER|M601, { RT, RA, SI } },
1224 { "addic", OP(12), OP_MASK, PPC, { RT, RA, SI } },
1225 { "ai", OP(12), OP_MASK, POWER, { RT, RA, SI } },
1226 { "subic", OP(12), OP_MASK, PPC, { RT, RA, NSI } },
1228 { "addic.", OP(13), OP_MASK, PPC, { RT, RA, SI } },
1229 { "ai.", OP(13), OP_MASK, POWER, { RT, RA, SI } },
1230 { "subic.", OP(13), OP_MASK, PPC, { RT, RA, NSI } },
1232 { "li", OP(14), DRA_MASK, PPC, { RT, SI } },
1233 { "lil", OP(14), DRA_MASK, POWER, { RT, SI } },
1234 { "addi", OP(14), OP_MASK, PPC, { RT, RA, SI } },
1235 { "cal", OP(14), OP_MASK, POWER, { RT, D, RA } },
1236 { "subi", OP(14), OP_MASK, PPC, { RT, RA, NSI } },
1237 { "la", OP(14), OP_MASK, PPC, { RT, D, RA } },
1239 { "lis", OP(15), DRA_MASK, PPC, { RT, SISIGNOPT } },
1240 { "liu", OP(15), DRA_MASK, POWER, { RT, SISIGNOPT } },
1241 { "addis", OP(15), OP_MASK, PPC, { RT,RA,SISIGNOPT } },
1242 { "cau", OP(15), OP_MASK, POWER, { RT,RA,SISIGNOPT } },
1243 { "subis", OP(15), OP_MASK, PPC, { RT, RA, NSI } },
1908 { "subfc", XO(31,8,0,0), XO_MASK, PPC, { RT, RA, RB } },
1909 { "sf", XO(31,8,0,0), XO_MASK, POWER, { RT, RA, RB } },
1910 { "subc", XO(31,8,0,0), XO_MASK, PPC, { RT, RB, RA } },
1911 { "subfc.", XO(31,8,0,1), XO_MASK, PPC, { RT, RA, RB } },
1912 { "sf.", XO(31,8,0,1), XO_MASK, POWER, { RT, RA, RB } },
1913 { "subc.", XO(31,8,0,1), XO_MASK, PPC, { RT, RB, RA } },
1914 { "subfco", XO(31,8,1,0), XO_MASK, PPC, { RT, RA, RB } },
1915 { "sfo", XO(31,8,1,0), XO_MASK, POWER, { RT, RA, RB } },
1916 { "subco", XO(31,8,1,0), XO_MASK, PPC, { RT, RB, RA } },
1917 { "subfco.", XO(31,8,1,1), XO_MASK, PPC, { RT, RA, RB } },
1918 { "sfo.", XO(31,8,1,1), XO_MASK, POWER, { RT, RA, RB } },
1919 { "subco.", XO(31,8,1,1), XO_MASK, PPC, { RT, RB, RA } },
1921 { "mulhdu", XO(31,9,0,0), XO_MASK, PPC|B64, { RT, RA, RB } },
1922 { "mulhdu.", XO(31,9,0,1), XO_MASK, PPC|B64, { RT, RA, RB } },
1924 { "addc", XO(31,10,0,0), XO_MASK, PPC, { RT, RA, RB } },
1925 { "a", XO(31,10,0,0), XO_MASK, POWER, { RT, RA, RB } },
1926 { "addc.", XO(31,10,0,1), XO_MASK, PPC, { RT, RA, RB } },
1927 { "a.", XO(31,10,0,1), XO_MASK, POWER, { RT, RA, RB } },
1928 { "addco", XO(31,10,1,0), XO_MASK, PPC, { RT, RA, RB } },
1929 { "ao", XO(31,10,1,0), XO_MASK, POWER, { RT, RA, RB } },
1930 { "addco.", XO(31,10,1,1), XO_MASK, PPC, { RT, RA, RB } },
1931 { "ao.", XO(31,10,1,1), XO_MASK, POWER, { RT, RA, RB } },
1933 { "mulhwu", XO(31,11,0,0), XO_MASK, PPC, { RT, RA, RB } },
1934 { "mulhwu.", XO(31,11,0,1), XO_MASK, PPC, { RT, RA, RB } },
1936 { "mfcr", X(31,19), XRARB_MASK, POWER|PPC, { RT } },
1938 { "lwarx", X(31,20), X_MASK, PPC, { RT, RA, RB } },
1940 { "ldx", X(31,21), X_MASK, PPC|B64, { RT, RA, RB } },
1942 { "lwzx", X(31,23), X_MASK, PPC, { RT, RA, RB } },
1943 { "lx", X(31,23), X_MASK, POWER, { RT, RA, RB } },
1969 { "subf", XO(31,40,0,0), XO_MASK, PPC, { RT, RA, RB } },
1970 { "sub", XO(31,40,0,0), XO_MASK, PPC, { RT, RB, RA } },
1971 { "subf.", XO(31,40,0,1), XO_MASK, PPC, { RT, RA, RB } },
1972 { "sub.", XO(31,40,0,1), XO_MASK, PPC, { RT, RB, RA } },
1973 { "subfo", XO(31,40,1,0), XO_MASK, PPC, { RT, RA, RB } },
1974 { "subo", XO(31,40,1,0), XO_MASK, PPC, { RT, RB, RA } },
1975 { "subfo.", XO(31,40,1,1), XO_MASK, PPC, { RT, RA, RB } },
1976 { "subo.", XO(31,40,1,1), XO_MASK, PPC, { RT, RB, RA } },
1978 { "ldux", X(31,53), X_MASK, PPC|B64, { RT, RAL, RB } },
1982 { "lwzux", X(31,55), X_MASK, PPC, { RT, RAL, RB } },
1983 { "lux", X(31,55), X_MASK, POWER, { RT, RA, RB } },
2007 { "mulhd", XO(31,73,0,0), XO_MASK, PPC|B64, { RT, RA, RB } },
2008 { "mulhd.", XO(31,73,0,1), XO_MASK, PPC|B64, { RT, RA, RB } },
2010 { "mulhw", XO(31,75,0,0), XO_MASK, PPC, { RT, RA, RB } },
2011 { "mulhw.", XO(31,75,0,1), XO_MASK, PPC, { RT, RA, RB } },
2013 { "mfmsr", X(31,83), XRARB_MASK, PPC|POWER, { RT } },
2015 { "ldarx", X(31,84), X_MASK, PPC|B64, { RT, RA, RB } },
2019 { "lbzx", X(31,87), X_MASK, PPC|POWER, { RT, RA, RB } },
2021 { "neg", XO(31,104,0,0), XORB_MASK, PPC|POWER, { RT, RA } },
2022 { "neg.", XO(31,104,0,1), XORB_MASK, PPC|POWER, { RT, RA } },
2023 { "nego", XO(31,104,1,0), XORB_MASK, PPC|POWER, { RT, RA } },
2024 { "nego.", XO(31,104,1,1), XORB_MASK, PPC|POWER, { RT, RA } },
2026 { "mul", XO(31,107,0,0), XO_MASK, POWER|M601, { RT, RA, RB } },
2027 { "mul.", XO(31,107,0,1), XO_MASK, POWER|M601, { RT, RA, RB } },
2028 { "mulo", XO(31,107,1,0), XO_MASK, POWER|M601, { RT, RA, RB } },
2029 { "mulo.", XO(31,107,1,1), XO_MASK, POWER|M601, { RT, RA, RB } },
2031 { "clf", X(31,118), XRB_MASK, POWER, { RT, RA } },
2033 { "lbzux", X(31,119), X_MASK, PPC|POWER, { RT, RAL, RB } },
2040 { "subfe", XO(31,136,0,0), XO_MASK, PPC, { RT, RA, RB } },
2041 { "sfe", XO(31,136,0,0), XO_MASK, POWER, { RT, RA, RB } },
2042 { "subfe.", XO(31,136,0,1), XO_MASK, PPC, { RT, RA, RB } },
2043 { "sfe.", XO(31,136,0,1), XO_MASK, POWER, { RT, RA, RB } },
2044 { "subfeo", XO(31,136,1,0), XO_MASK, PPC, { RT, RA, RB } },
2045 { "sfeo", XO(31,136,1,0), XO_MASK, POWER, { RT, RA, RB } },
2046 { "subfeo.", XO(31,136,1,1), XO_MASK, PPC, { RT, RA, RB } },
2047 { "sfeo.", XO(31,136,1,1), XO_MASK, POWER, { RT, RA, RB } },
2049 { "adde", XO(31,138,0,0), XO_MASK, PPC, { RT, RA, RB } },
2050 { "ae", XO(31,138,0,0), XO_MASK, POWER, { RT, RA, RB } },
2051 { "adde.", XO(31,138,0,1), XO_MASK, PPC, { RT, RA, RB } },
2052 { "ae.", XO(31,138,0,1), XO_MASK, POWER, { RT, RA, RB } },
2053 { "addeo", XO(31,138,1,0), XO_MASK, PPC, { RT, RA, RB } },
2054 { "aeo", XO(31,138,1,0), XO_MASK, POWER, { RT, RA, RB } },
2055 { "addeo.", XO(31,138,1,1), XO_MASK, PPC, { RT, RA, RB } },
2056 { "aeo.", XO(31,138,1,1), XO_MASK, POWER, { RT, RA, RB } },
2084 { "subfze", XO(31,200,0,0), XORB_MASK, PPC, { RT, RA } },
2085 { "sfze", XO(31,200,0,0), XORB_MASK, POWER, { RT, RA } },
2086 { "subfze.", XO(31,200,0,1), XORB_MASK, PPC, { RT, RA } },
2087 { "sfze.", XO(31,200,0,1), XORB_MASK, POWER, { RT, RA } },
2088 { "subfzeo", XO(31,200,1,0), XORB_MASK, PPC, { RT, RA } },
2089 { "sfzeo", XO(31,200,1,0), XORB_MASK, POWER, { RT, RA } },
2090 { "subfzeo.",XO(31,200,1,1), XORB_MASK, PPC, { RT, RA } },
2091 { "sfzeo.", XO(31,200,1,1), XORB_MASK, POWER, { RT, RA } },
2093 { "addze", XO(31,202,0,0), XORB_MASK, PPC, { RT, RA } },
2094 { "aze", XO(31,202,0,0), XORB_MASK, POWER, { RT, RA } },
2095 { "addze.", XO(31,202,0,1), XORB_MASK, PPC, { RT, RA } },
2096 { "aze.", XO(31,202,0,1), XORB_MASK, POWER, { RT, RA } },
2097 { "addzeo", XO(31,202,1,0), XORB_MASK, PPC, { RT, RA } },
2098 { "azeo", XO(31,202,1,0), XORB_MASK, POWER, { RT, RA } },
2099 { "addzeo.", XO(31,202,1,1), XORB_MASK, PPC, { RT, RA } },
2100 { "azeo.", XO(31,202,1,1), XORB_MASK, POWER, { RT, RA } },
2114 { "subfme", XO(31,232,0,0), XORB_MASK, PPC, { RT, RA } },
2115 { "sfme", XO(31,232,0,0), XORB_MASK, POWER, { RT, RA } },
2116 { "subfme.", XO(31,232,0,1), XORB_MASK, PPC, { RT, RA } },
2117 { "sfme.", XO(31,232,0,1), XORB_MASK, POWER, { RT, RA } },
2118 { "subfmeo", XO(31,232,1,0), XORB_MASK, PPC, { RT, RA } },
2119 { "sfmeo", XO(31,232,1,0), XORB_MASK, POWER, { RT, RA } },
2120 { "subfmeo.",XO(31,232,1,1), XORB_MASK, PPC, { RT, RA } },
2121 { "sfmeo.", XO(31,232,1,1), XORB_MASK, POWER, { RT, RA } },
2123 { "mulld", XO(31,233,0,0), XO_MASK, PPC|B64, { RT, RA, RB } },
2124 { "mulld.", XO(31,233,0,1), XO_MASK, PPC|B64, { RT, RA, RB } },
2125 { "mulldo", XO(31,233,1,0), XO_MASK, PPC|B64, { RT, RA, RB } },
2126 { "mulldo.", XO(31,233,1,1), XO_MASK, PPC|B64, { RT, RA, RB } },
2128 { "addme", XO(31,234,0,0), XORB_MASK, PPC, { RT, RA } },
2129 { "ame", XO(31,234,0,0), XORB_MASK, POWER, { RT, RA } },
2130 { "addme.", XO(31,234,0,1), XORB_MASK, PPC, { RT, RA } },
2131 { "ame.", XO(31,234,0,1), XORB_MASK, POWER, { RT, RA } },
2132 { "addmeo", XO(31,234,1,0), XORB_MASK, PPC, { RT, RA } },
2133 { "ameo", XO(31,234,1,0), XORB_MASK, POWER, { RT, RA } },
2134 { "addmeo.", XO(31,234,1,1), XORB_MASK, PPC, { RT, RA } },
2135 { "ameo.", XO(31,234,1,1), XORB_MASK, POWER, { RT, RA } },
2137 { "mullw", XO(31,235,0,0), XO_MASK, PPC, { RT, RA, RB } },
2138 { "muls", XO(31,235,0,0), XO_MASK, POWER, { RT, RA, RB } },
2139 { "mullw.", XO(31,235,0,1), XO_MASK, PPC, { RT, RA, RB } },
2140 { "muls.", XO(31,235,0,1), XO_MASK, POWER, { RT, RA, RB } },
2141 { "mullwo", XO(31,235,1,0), XO_MASK, PPC, { RT, RA, RB } },
2142 { "mulso", XO(31,235,1,0), XO_MASK, POWER, { RT, RA, RB } },
2143 { "mullwo.", XO(31,235,1,1), XO_MASK, PPC, { RT, RA, RB } },
2144 { "mulso.", XO(31,235,1,1), XO_MASK, POWER, { RT, RA, RB } },
2156 { "doz", XO(31,264,0,0), XO_MASK, POWER|M601, { RT, RA, RB } },
2157 { "doz.", XO(31,264,0,1), XO_MASK, POWER|M601, { RT, RA, RB } },
2158 { "dozo", XO(31,264,1,0), XO_MASK, POWER|M601, { RT, RA, RB } },
2159 { "dozo.", XO(31,264,1,1), XO_MASK, POWER|M601, { RT, RA, RB } },
2161 { "add", XO(31,266,0,0), XO_MASK, PPC, { RT, RA, RB } },
2162 { "cax", XO(31,266,0,0), XO_MASK, POWER, { RT, RA, RB } },
2163 { "add.", XO(31,266,0,1), XO_MASK, PPC, { RT, RA, RB } },
2164 { "cax.", XO(31,266,0,1), XO_MASK, POWER, { RT, RA, RB } },
2165 { "addo", XO(31,266,1,0), XO_MASK, PPC, { RT, RA, RB } },
2166 { "caxo", XO(31,266,1,0), XO_MASK, POWER, { RT, RA, RB } },
2167 { "addo.", XO(31,266,1,1), XO_MASK, PPC, { RT, RA, RB } },
2168 { "caxo.", XO(31,266,1,1), XO_MASK, POWER, { RT, RA, RB } },
2170 { "lscbx", XRC(31,277,0), X_MASK, POWER|M601, { RT, RA, RB } },
2171 { "lscbx.", XRC(31,277,1), X_MASK, POWER|M601, { RT, RA, RB } },
2175 { "lhzx", X(31,279), X_MASK, PPC|POWER, { RT, RA, RB } },
2185 { "eciwx", X(31,310), X_MASK, PPC, { RT, RA, RB } },
2187 { "lhzux", X(31,311), X_MASK, PPC|POWER, { RT, RAL, RB } },
2192 { "mfdcr", X(31,323), X_MASK, PPC, { RT, SPR } },
2194 { "div", XO(31,331,0,0), XO_MASK, POWER|M601, { RT, RA, RB } },
2195 { "div.", XO(31,331,0,1), XO_MASK, POWER|M601, { RT, RA, RB } },
2196 { "divo", XO(31,331,1,0), XO_MASK, POWER|M601, { RT, RA, RB } },
2197 { "divo.", XO(31,331,1,1), XO_MASK, POWER|M601, { RT, RA, RB } },
2199 { "mfmq", XSPR(31,339,0), XSPR_MASK, POWER|M601, { RT } },
2200 { "mfxer", XSPR(31,339,1), XSPR_MASK, PPC|POWER, { RT } },
2201 { "mfrtcu", XSPR(31,339,4), XSPR_MASK, PPC|POWER, { RT } },
2202 { "mfrtcl", XSPR(31,339,5), XSPR_MASK, PPC|POWER, { RT } },
2203 { "mfdec", XSPR(31,339,6), XSPR_MASK, POWER|M601, { RT } },
2204 { "mflr", XSPR(31,339,8), XSPR_MASK, PPC|POWER, { RT } },
2205 { "mfctr", XSPR(31,339,9), XSPR_MASK, PPC|POWER, { RT } },
2206 { "mftid", XSPR(31,339,17), XSPR_MASK, POWER, { RT } },
2207 { "mfdsisr", XSPR(31,339,18), XSPR_MASK, PPC|POWER, { RT } },
2208 { "mfdar", XSPR(31,339,19), XSPR_MASK, PPC|POWER, { RT } },
2209 { "mfdec", XSPR(31,339,22), XSPR_MASK, PPC, { RT } },
2210 { "mfsdr0", XSPR(31,339,24), XSPR_MASK, POWER, { RT } },
2211 { "mfsdr1", XSPR(31,339,25), XSPR_MASK, PPC|POWER, { RT } },
2212 { "mfsrr0", XSPR(31,339,26), XSPR_MASK, PPC|POWER, { RT } },
2213 { "mfsrr1", XSPR(31,339,27), XSPR_MASK, PPC|POWER, { RT } },
2214 { "mfsprg", XSPR(31,339,272), XSPRG_MASK, PPC, { RT, SPRG } },
2215 { "mfasr", XSPR(31,339,280), XSPR_MASK, PPC|B64, { RT } },
2216 { "mfear", XSPR(31,339,282), XSPR_MASK, PPC, { RT } },
2217 { "mfpvr", XSPR(31,339,287), XSPR_MASK, PPC, { RT } },
2218 { "mfibatu", XSPR(31,339,528), XSPRBAT_MASK, PPC, { RT, SPRBAT } },
2219 { "mfibatl", XSPR(31,339,529), XSPRBAT_MASK, PPC, { RT, SPRBAT } },
2220 { "mfdbatu", XSPR(31,339,536), XSPRBAT_MASK, PPC, { RT, SPRBAT } },
2221 { "mfdbatl", XSPR(31,339,537), XSPRBAT_MASK, PPC, { RT, SPRBAT } },
2222 { "mfspr", X(31,339), X_MASK, PPC|POWER, { RT, SPR } },
2224 { "lwax", X(31,341), X_MASK, PPC|B64, { RT, RA, RB } },
2226 { "lhax", X(31,343), X_MASK, PPC|POWER, { RT, RA, RB } },
2230 { "abs", XO(31,360,0,0), XORB_MASK, POWER|M601, { RT, RA } },
2231 { "abs.", XO(31,360,0,1), XORB_MASK, POWER|M601, { RT, RA } },
2232 { "abso", XO(31,360,1,0), XORB_MASK, POWER|M601, { RT, RA } },
2233 { "abso.", XO(31,360,1,1), XORB_MASK, POWER|M601, { RT, RA } },
2235 { "divs", XO(31,363,0,0), XO_MASK, POWER|M601, { RT, RA, RB } },
2236 { "divs.", XO(31,363,0,1), XO_MASK, POWER|M601, { RT, RA, RB } },
2237 { "divso", XO(31,363,1,0), XO_MASK, POWER|M601, { RT, RA, RB } },
2238 { "divso.", XO(31,363,1,1), XO_MASK, POWER|M601, { RT, RA, RB } },
2242 { "mftbu", XSPR(31,371,269), XSPR_MASK, PPC, { RT } },
2243 { "mftb", X(31,371), X_MASK, PPC, { RT, TBR } },
2245 { "lwaux", X(31,373), X_MASK, PPC|B64, { RT, RAL, RB } },
2247 { "lhaux", X(31,375), X_MASK, PPC|POWER, { RT, RAL, RB } },
2267 { "ecowx", X(31,438), X_MASK, PPC, { RT, RA, RB } },
2278 { "divdu", XO(31,457,0,0), XO_MASK, PPC|B64, { RT, RA, RB } },
2279 { "divdu.", XO(31,457,0,1), XO_MASK, PPC|B64, { RT, RA, RB } },
2280 { "divduo", XO(31,457,1,0), XO_MASK, PPC|B64, { RT, RA, RB } },
2281 { "divduo.", XO(31,457,1,1), XO_MASK, PPC|B64, { RT, RA, RB } },
2283 { "divwu", XO(31,459,0,0), XO_MASK, PPC, { RT, RA, RB } },
2284 { "divwu.", XO(31,459,0,1), XO_MASK, PPC, { RT, RA, RB } },
2285 { "divwuo", XO(31,459,1,0), XO_MASK, PPC, { RT, RA, RB } },
2286 { "divwuo.", XO(31,459,1,1), XO_MASK, PPC, { RT, RA, RB } },
2318 { "nabs", XO(31,488,0,0), XORB_MASK, POWER|M601, { RT, RA } },
2319 { "nabs.", XO(31,488,0,1), XORB_MASK, POWER|M601, { RT, RA } },
2320 { "nabso", XO(31,488,1,0), XORB_MASK, POWER|M601, { RT, RA } },
2321 { "nabso.", XO(31,488,1,1), XORB_MASK, POWER|M601, { RT, RA } },
2323 { "divd", XO(31,489,0,0), XO_MASK, PPC|B64, { RT, RA, RB } },
2324 { "divd.", XO(31,489,0,1), XO_MASK, PPC|B64, { RT, RA, RB } },
2325 { "divdo", XO(31,489,1,0), XO_MASK, PPC|B64, { RT, RA, RB } },
2326 { "divdo.", XO(31,489,1,1), XO_MASK, PPC|B64, { RT, RA, RB } },
2328 { "divw", XO(31,491,0,0), XO_MASK, PPC, { RT, RA, RB } },
2329 { "divw.", XO(31,491,0,1), XO_MASK, PPC, { RT, RA, RB } },
2330 { "divwo", XO(31,491,1,0), XO_MASK, PPC, { RT, RA, RB } },
2331 { "divwo.", XO(31,491,1,1), XO_MASK, PPC, { RT, RA, RB } },
2335 { "cli", X(31,502), XRB_MASK, POWER, { RT, RA } },
2339 { "clcs", X(31,531), XRB_MASK, POWER|M601, { RT, RA } },
2341 { "lswx", X(31,533), X_MASK, PPC, { RT, RA, RB } },
2342 { "lsx", X(31,533), X_MASK, POWER, { RT, RA, RB } },
2344 { "lwbrx", X(31,534), X_MASK, PPC, { RT, RA, RB } },
2345 { "lbrx", X(31,534), X_MASK, POWER, { RT, RA, RB } },
2367 { "mfsr", X(31,595), XRB_MASK|(1<<20), PPC|POWER|B32, { RT, SR } },
2369 { "lswi", X(31,597), X_MASK, PPC, { RT, RA, NB } },
2370 { "lsi", X(31,597), X_MASK, POWER, { RT, RA, NB } },
2377 { "mfsri", X(31,627), X_MASK, POWER, { RT, RA, RB } },
2383 { "mfsrin", X(31,659), XRA_MASK, PPC|B32, { RT, RB } },
2420 { "lhbrx", X(31,790), X_MASK, PPC|POWER, { RT, RA, RB } },
2430 { "rac", X(31,818), X_MASK, POWER, { RT, RA, RB } },
2470 { "lwz", OP(32), OP_MASK, PPC, { RT, D, RA } },
2471 { "l", OP(32), OP_MASK, POWER, { RT, D, RA } },
2473 { "lwzu", OP(33), OP_MASK, PPC, { RT, D, RAL } },
2474 { "lu", OP(33), OP_MASK, POWER, { RT, D, RA } },
2476 { "lbz", OP(34), OP_MASK, PPC|POWER, { RT, D, RA } },
2478 { "lbzu", OP(35), OP_MASK, PPC|POWER, { RT, D, RAL } },
2490 { "lhz", OP(40), OP_MASK, PPC|POWER, { RT, D, RA } },
2492 { "lhzu", OP(41), OP_MASK, PPC|POWER, { RT, D, RAL } },
2494 { "lha", OP(42), OP_MASK, PPC|POWER, { RT, D, RA } },
2496 { "lhau", OP(43), OP_MASK, PPC|POWER, { RT, D, RAL } },
2502 { "lmw", OP(46), OP_MASK, PPC, { RT, D, RAM } },
2503 { "lm", OP(46), OP_MASK, POWER, { RT, D, RA } },
2528 { "ld", DSO(58,0), DS_MASK, PPC|B64, { RT, DS, RA } },
2530 { "ldu", DSO(58,1), DS_MASK, PPC|B64, { RT, DS, RAL } },
2532 { "lwa", DSO(58,2), DS_MASK, PPC|B64, { RT, DS, RA } },