Lines Matching defs:RS
315 the RS field in the instruction. This is used for extended
320 /* The RS field in a D, DS, X, XFX, XS, M, MD or MDS form
323 #define RS (46)
324 #define RT (RS)
795 the RS field in the instruction. This is used for extended
1803 { "rlwimi", M(20,0), M_MASK, PPC, { RA,RS,SH,MBE,ME } },
1804 { "rlimi", M(20,0), M_MASK, POWER, { RA,RS,SH,MBE,ME } },
1806 { "rlwimi.", M(20,1), M_MASK, PPC, { RA,RS,SH,MBE,ME } },
1807 { "rlimi.", M(20,1), M_MASK, POWER, { RA,RS,SH,MBE,ME } },
1809 { "rotlwi", MME(21,31,0), MMBME_MASK, PPC, { RA, RS, SH } },
1810 { "clrlwi", MME(21,31,0), MSHME_MASK, PPC, { RA, RS, MB } },
1811 { "rlwinm", M(21,0), M_MASK, PPC, { RA,RS,SH,MBE,ME } },
1812 { "rlinm", M(21,0), M_MASK, POWER, { RA,RS,SH,MBE,ME } },
1813 { "rotlwi.", MME(21,31,1), MMBME_MASK, PPC, { RA,RS,SH } },
1814 { "clrlwi.", MME(21,31,1), MSHME_MASK, PPC, { RA, RS, MB } },
1815 { "rlwinm.", M(21,1), M_MASK, PPC, { RA,RS,SH,MBE,ME } },
1816 { "rlinm.", M(21,1), M_MASK, POWER, { RA,RS,SH,MBE,ME } },
1818 { "rlmi", M(22,0), M_MASK, POWER|M601, { RA,RS,RB,MBE,ME } },
1819 { "rlmi.", M(22,1), M_MASK, POWER|M601, { RA,RS,RB,MBE,ME } },
1821 { "rotlw", MME(23,31,0), MMBME_MASK, PPC, { RA, RS, RB } },
1822 { "rlwnm", M(23,0), M_MASK, PPC, { RA,RS,RB,MBE,ME } },
1823 { "rlnm", M(23,0), M_MASK, POWER, { RA,RS,RB,MBE,ME } },
1824 { "rotlw.", MME(23,31,1), MMBME_MASK, PPC, { RA, RS, RB } },
1825 { "rlwnm.", M(23,1), M_MASK, PPC, { RA,RS,RB,MBE,ME } },
1826 { "rlnm.", M(23,1), M_MASK, POWER, { RA,RS,RB,MBE,ME } },
1829 { "ori", OP(24), OP_MASK, PPC, { RA, RS, UI } },
1830 { "oril", OP(24), OP_MASK, POWER, { RA, RS, UI } },
1832 { "oris", OP(25), OP_MASK, PPC, { RA, RS, UI } },
1833 { "oriu", OP(25), OP_MASK, POWER, { RA, RS, UI } },
1835 { "xori", OP(26), OP_MASK, PPC, { RA, RS, UI } },
1836 { "xoril", OP(26), OP_MASK, POWER, { RA, RS, UI } },
1838 { "xoris", OP(27), OP_MASK, PPC, { RA, RS, UI } },
1839 { "xoriu", OP(27), OP_MASK, POWER, { RA, RS, UI } },
1841 { "andi.", OP(28), OP_MASK, PPC, { RA, RS, UI } },
1842 { "andil.", OP(28), OP_MASK, POWER, { RA, RS, UI } },
1844 { "andis.", OP(29), OP_MASK, PPC, { RA, RS, UI } },
1845 { "andiu.", OP(29), OP_MASK, POWER, { RA, RS, UI } },
1847 { "rotldi", MD(30,0,0), MDMB_MASK, PPC|B64, { RA, RS, SH6 } },
1848 { "clrldi", MD(30,0,0), MDSH_MASK, PPC|B64, { RA, RS, MB6 } },
1849 { "rldicl", MD(30,0,0), MD_MASK, PPC|B64, { RA, RS, SH6, MB6 } },
1850 { "rotldi.", MD(30,0,1), MDMB_MASK, PPC|B64, { RA, RS, SH6 } },
1851 { "clrldi.", MD(30,0,1), MDSH_MASK, PPC|B64, { RA, RS, MB6 } },
1852 { "rldicl.", MD(30,0,1), MD_MASK, PPC|B64, { RA, RS, SH6, MB6 } },
1854 { "rldicr", MD(30,1,0), MD_MASK, PPC|B64, { RA, RS, SH6, ME6 } },
1855 { "rldicr.", MD(30,1,1), MD_MASK, PPC|B64, { RA, RS, SH6, ME6 } },
1857 { "rldic", MD(30,2,0), MD_MASK, PPC|B64, { RA, RS, SH6, MB6 } },
1858 { "rldic.", MD(30,2,1), MD_MASK, PPC|B64, { RA, RS, SH6, MB6 } },
1860 { "rldimi", MD(30,3,0), MD_MASK, PPC|B64, { RA, RS, SH6, MB6 } },
1861 { "rldimi.", MD(30,3,1), MD_MASK, PPC|B64, { RA, RS, SH6, MB6 } },
1863 { "rotld", MDS(30,8,0), MDSMB_MASK, PPC|B64, { RA, RS, RB } },
1864 { "rldcl", MDS(30,8,0), MDS_MASK, PPC|B64, { RA, RS, RB, MB6 } },
1865 { "rotld.", MDS(30,8,1), MDSMB_MASK, PPC|B64, { RA, RS, RB } },
1866 { "rldcl.", MDS(30,8,1), MDS_MASK, PPC|B64, { RA, RS, RB, MB6 } },
1868 { "rldcr", MDS(30,9,0), MDS_MASK, PPC|B64, { RA, RS, RB, ME6 } },
1869 { "rldcr.", MDS(30,9,1), MDS_MASK, PPC|B64, { RA, RS, RB, ME6 } },
1945 { "slw", XRC(31,24,0), X_MASK, PPC, { RA, RS, RB } },
1946 { "sl", XRC(31,24,0), X_MASK, POWER, { RA, RS, RB } },
1947 { "slw.", XRC(31,24,1), X_MASK, PPC, { RA, RS, RB } },
1948 { "sl.", XRC(31,24,1), X_MASK, POWER, { RA, RS, RB } },
1950 { "cntlzw", XRC(31,26,0), XRB_MASK, PPC, { RA, RS } },
1951 { "cntlz", XRC(31,26,0), XRB_MASK, POWER, { RA, RS } },
1952 { "cntlzw.", XRC(31,26,1), XRB_MASK, PPC, { RA, RS } },
1953 { "cntlz.", XRC(31,26,1), XRB_MASK, POWER, { RA, RS } },
1955 { "sld", XRC(31,27,0), X_MASK, PPC|B64, { RA, RS, RB } },
1956 { "sld.", XRC(31,27,1), X_MASK, PPC|B64, { RA, RS, RB } },
1958 { "and", XRC(31,28,0), X_MASK, PPC|POWER, { RA, RS, RB } },
1959 { "and.", XRC(31,28,1), X_MASK, PPC|POWER, { RA, RS, RB } },
1961 { "maskg", XRC(31,29,0), X_MASK, POWER|M601, { RA, RS, RB } },
1962 { "maskg.", XRC(31,29,1), X_MASK, POWER|M601, { RA, RS, RB } },
1985 { "cntlzd", XRC(31,58,0), XRB_MASK, PPC|B64, { RA, RS } },
1986 { "cntlzd.", XRC(31,58,1), XRB_MASK, PPC|B64, { RA, RS } },
1988 { "andc", XRC(31,60,0), X_MASK, PPC|POWER, { RA, RS, RB } },
1989 { "andc.", XRC(31,60,1), X_MASK, PPC|POWER, { RA, RS, RB } },
2035 { "not", XRC(31,124,0), X_MASK, PPC|POWER, { RA, RS, RBS } },
2036 { "nor", XRC(31,124,0), X_MASK, PPC|POWER, { RA, RS, RB } },
2037 { "not.", XRC(31,124,1), X_MASK, PPC|POWER, { RA, RS, RBS } },
2038 { "nor.", XRC(31,124,1), X_MASK, PPC|POWER, { RA, RS, RB } },
2058 { "mtcr", XFXM(31,144,0xff), XFXFXM_MASK|FXM_MASK, PPC|POWER, { RS }},
2059 { "mtcrf", X(31,144), XFXFXM_MASK, PPC|POWER, { FXM, RS } },
2061 { "mtmsr", X(31,146), XRARB_MASK, PPC|POWER, { RS } },
2063 { "stdx", X(31,149), X_MASK, PPC|B64, { RS, RA, RB } },
2065 { "stwcx.", XRC(31,150,1), X_MASK, PPC, { RS, RA, RB } },
2067 { "stwx", X(31,151), X_MASK, PPC, { RS, RA, RB } },
2068 { "stx", X(31,151), X_MASK, POWER, { RS, RA, RB } },
2070 { "slq", XRC(31,152,0), X_MASK, POWER|M601, { RA, RS, RB } },
2071 { "slq.", XRC(31,152,1), X_MASK, POWER|M601, { RA, RS, RB } },
2073 { "sle", XRC(31,153,0), X_MASK, POWER|M601, { RA, RS, RB } },
2074 { "sle.", XRC(31,153,1), X_MASK, POWER|M601, { RA, RS, RB } },
2076 { "stdux", X(31,181), X_MASK, PPC|B64, { RS, RAS, RB } },
2078 { "stwux", X(31,183), X_MASK, PPC, { RS, RAS, RB } },
2079 { "stux", X(31,183), X_MASK, POWER, { RS, RA, RB } },
2081 { "sliq", XRC(31,184,0), X_MASK, POWER|M601, { RA, RS, SH } },
2082 { "sliq.", XRC(31,184,1), X_MASK, POWER|M601, { RA, RS, SH } },
2102 { "mtsr", X(31,210), XRB_MASK|(1<<20), PPC|POWER|B32, { SR, RS } },
2104 { "stdcx.", XRC(31,214,1), X_MASK, PPC|B64, { RS, RA, RB } },
2106 { "stbx", X(31,215), X_MASK, PPC|POWER, { RS, RA, RB } },
2108 { "sllq", XRC(31,216,0), X_MASK, POWER|M601, { RA, RS, RB } },
2109 { "sllq.", XRC(31,216,1), X_MASK, POWER|M601, { RA, RS, RB } },
2111 { "sleq", XRC(31,217,0), X_MASK, POWER|M601, { RA, RS, RB } },
2112 { "sleq.", XRC(31,217,1), X_MASK, POWER|M601, { RA, RS, RB } },
2146 { "mtsrin", X(31,242), XRA_MASK, PPC|B32, { RS, RB } },
2147 { "mtsri", X(31,242), XRA_MASK, POWER|B32, { RS, RB } },
2151 { "stbux", X(31,247), X_MASK, PPC|POWER, { RS, RAS, RB } },
2153 { "slliq", XRC(31,248,0), X_MASK, POWER|M601, { RA, RS, SH } },
2154 { "slliq.", XRC(31,248,1), X_MASK, POWER|M601, { RA, RS, SH } },
2179 { "eqv", XRC(31,284,0), X_MASK, PPC|POWER, { RA, RS, RB } },
2180 { "eqv.", XRC(31,284,1), X_MASK, PPC|POWER, { RA, RS, RB } },
2189 { "xor", XRC(31,316,0), X_MASK, PPC|POWER, { RA, RS, RB } },
2190 { "xor.", XRC(31,316,1), X_MASK, PPC|POWER, { RA, RS, RB } },
2249 { "sthx", X(31,407), X_MASK, PPC|POWER, { RS, RA, RB } },
2259 { "orc", XRC(31,412,0), X_MASK, PPC|POWER, { RA, RS, RB } },
2260 { "orc.", XRC(31,412,1), X_MASK, PPC|POWER, { RA, RS, RB } },
2262 { "sradi", XS(31,413,0), XS_MASK, PPC|B64, { RA, RS, SH6 } },
2263 { "sradi.", XS(31,413,1), XS_MASK, PPC|B64, { RA, RS, SH6 } },
2269 { "sthux", X(31,439), X_MASK, PPC|POWER, { RS, RAS, RB } },
2271 { "mr", XRC(31,444,0), X_MASK, PPC|POWER, { RA, RS, RBS } },
2272 { "or", XRC(31,444,0), X_MASK, PPC|POWER, { RA, RS, RB } },
2273 { "mr.", XRC(31,444,1), X_MASK, PPC|POWER, { RA, RS, RBS } },
2274 { "or.", XRC(31,444,1), X_MASK, PPC|POWER, { RA, RS, RB } },
2276 { "mtdcr", X(31,451), X_MASK, PPC, { SPR, RS } },
2288 { "mtmq", XSPR(31,467,0), XSPR_MASK, POWER|M601, { RS } },
2289 { "mtxer", XSPR(31,467,1), XSPR_MASK, PPC|POWER, { RS } },
2290 { "mtlr", XSPR(31,467,8), XSPR_MASK, PPC|POWER, { RS } },
2291 { "mtctr", XSPR(31,467,9), XSPR_MASK, PPC|POWER, { RS } },
2292 { "mttid", XSPR(31,467,17), XSPR_MASK, POWER, { RS } },
2293 { "mtdsisr", XSPR(31,467,18), XSPR_MASK, PPC|POWER, { RS } },
2294 { "mtdar", XSPR(31,467,19), XSPR_MASK, PPC|POWER, { RS } },
2295 { "mtrtcu", XSPR(31,467,20), XSPR_MASK, PPC|POWER, { RS } },
2296 { "mtrtcl", XSPR(31,467,21), XSPR_MASK, PPC|POWER, { RS } },
2297 { "mtdec", XSPR(31,467,22), XSPR_MASK, PPC|POWER, { RS } },
2298 { "mtsdr0", XSPR(31,467,24), XSPR_MASK, POWER, { RS } },
2299 { "mtsdr1", XSPR(31,467,25), XSPR_MASK, PPC|POWER, { RS } },
2300 { "mtsrr0", XSPR(31,467,26), XSPR_MASK, PPC|POWER, { RS } },
2301 { "mtsrr1", XSPR(31,467,27), XSPR_MASK, PPC|POWER, { RS } },
2302 { "mtsprg", XSPR(31,467,272), XSPRG_MASK, PPC, { SPRG, RS } },
2303 { "mtasr", XSPR(31,467,280), XSPR_MASK, PPC|B64, { RS } },
2304 { "mtear", XSPR(31,467,282), XSPR_MASK, PPC, { RS } },
2305 { "mttbl", XSPR(31,467,284), XSPR_MASK, PPC, { RS } },
2306 { "mttbu", XSPR(31,467,285), XSPR_MASK, PPC, { RS } },
2307 { "mtibatu", XSPR(31,467,528), XSPRBAT_MASK, PPC, { SPRBAT, RS } },
2308 { "mtibatl", XSPR(31,467,529), XSPRBAT_MASK, PPC, { SPRBAT, RS } },
2309 { "mtdbatu", XSPR(31,467,536), XSPRBAT_MASK, PPC, { SPRBAT, RS } },
2310 { "mtdbatl", XSPR(31,467,537), XSPRBAT_MASK, PPC, { SPRBAT, RS } },
2311 { "mtspr", X(31,467), X_MASK, PPC|POWER, { SPR, RS } },
2315 { "nand", XRC(31,476,0), X_MASK, PPC|POWER, { RA, RS, RB } },
2316 { "nand.", XRC(31,476,1), X_MASK, PPC|POWER, { RA, RS, RB } },
2349 { "srw", XRC(31,536,0), X_MASK, PPC, { RA, RS, RB } },
2350 { "sr", XRC(31,536,0), X_MASK, POWER, { RA, RS, RB } },
2351 { "srw.", XRC(31,536,1), X_MASK, PPC, { RA, RS, RB } },
2352 { "sr.", XRC(31,536,1), X_MASK, POWER, { RA, RS, RB } },
2354 { "rrib", XRC(31,537,0), X_MASK, POWER|M601, { RA, RS, RB } },
2355 { "rrib.", XRC(31,537,1), X_MASK, POWER|M601, { RA, RS, RB } },
2357 { "srd", XRC(31,539,0), X_MASK, PPC|B64, { RA, RS, RB } },
2358 { "srd.", XRC(31,539,1), X_MASK, PPC|B64, { RA, RS, RB } },
2360 { "maskir", XRC(31,541,0), X_MASK, POWER|M601, { RA, RS, RB } },
2361 { "maskir.", XRC(31,541,1), X_MASK, POWER|M601, { RA, RS, RB } },
2379 { "dclst", X(31,630), XRB_MASK, POWER, { RS, RA } },
2385 { "stswx", X(31,661), X_MASK, PPC, { RS, RA, RB } },
2386 { "stsx", X(31,661), X_MASK, POWER, { RS, RA, RB } },
2388 { "stwbrx", X(31,662), X_MASK, PPC, { RS, RA, RB } },
2389 { "stbrx", X(31,662), X_MASK, POWER, { RS, RA, RB } },
2393 { "srq", XRC(31,664,0), X_MASK, POWER|M601, { RA, RS, RB } },
2394 { "srq.", XRC(31,664,1), X_MASK, POWER|M601, { RA, RS, RB } },
2396 { "sre", XRC(31,665,0), X_MASK, POWER|M601, { RA, RS, RB } },
2397 { "sre.", XRC(31,665,1), X_MASK, POWER|M601, { RA, RS, RB } },
2401 { "sriq", XRC(31,696,0), X_MASK, POWER|M601, { RA, RS, SH } },
2402 { "sriq.", XRC(31,696,1), X_MASK, POWER|M601, { RA, RS, SH } },
2404 { "stswi", X(31,725), X_MASK, PPC, { RS, RA, NB } },
2405 { "stsi", X(31,725), X_MASK, POWER, { RS, RA, NB } },
2409 { "srlq", XRC(31,728,0), X_MASK, POWER|M601, { RA, RS, RB } },
2410 { "srlq.", XRC(31,728,1), X_MASK, POWER|M601, { RA, RS, RB } },
2412 { "sreq", XRC(31,729,0), X_MASK, POWER|M601, { RA, RS, RB } },
2413 { "sreq.", XRC(31,729,1), X_MASK, POWER|M601, { RA, RS, RB } },
2417 { "srliq", XRC(31,760,0), X_MASK, POWER|M601, { RA, RS, SH } },
2418 { "srliq.", XRC(31,760,1), X_MASK, POWER|M601, { RA, RS, SH } },
2422 { "sraw", XRC(31,792,0), X_MASK, PPC, { RA, RS, RB } },
2423 { "sra", XRC(31,792,0), X_MASK, POWER, { RA, RS, RB } },
2424 { "sraw.", XRC(31,792,1), X_MASK, PPC, { RA, RS, RB } },
2425 { "sra.", XRC(31,792,1), X_MASK, POWER, { RA, RS, RB } },
2427 { "srad", XRC(31,794,0), X_MASK, PPC|B64, { RA, RS, RB } },
2428 { "srad.", XRC(31,794,1), X_MASK, PPC|B64, { RA, RS, RB } },
2432 { "srawi", XRC(31,824,0), X_MASK, PPC, { RA, RS, SH } },
2433 { "srai", XRC(31,824,0), X_MASK, POWER, { RA, RS, SH } },
2434 { "srawi.", XRC(31,824,1), X_MASK, PPC, { RA, RS, SH } },
2435 { "srai.", XRC(31,824,1), X_MASK, POWER, { RA, RS, SH } },
2439 { "sthbrx", X(31,918), X_MASK, PPC|POWER, { RS, RA, RB } },
2441 { "sraq", XRC(31,920,0), X_MASK, POWER|M601, { RA, RS, RB } },
2442 { "sraq.", XRC(31,920,1), X_MASK, POWER|M601, { RA, RS, RB } },
2444 { "srea", XRC(31,921,0), X_MASK, POWER|M601, { RA, RS, RB } },
2445 { "srea.", XRC(31,921,1), X_MASK, POWER|M601, { RA, RS, RB } },
2447 { "extsh", XRC(31,922,0), XRB_MASK, PPC, { RA, RS } },
2448 { "exts", XRC(31,922,0), XRB_MASK, POWER, { RA, RS } },
2449 { "extsh.", XRC(31,922,1), XRB_MASK, PPC, { RA, RS } },
2450 { "exts.", XRC(31,922,1), XRB_MASK, POWER, { RA, RS } },
2452 { "sraiq", XRC(31,952,0), X_MASK, POWER|M601, { RA, RS, SH } },
2453 { "sraiq.", XRC(31,952,1), X_MASK, POWER|M601, { RA, RS, SH } },
2455 { "extsb", XRC(31,954,0), XRB_MASK, PPC, { RA, RS} },
2456 { "extsb.", XRC(31,954,1), XRB_MASK, PPC, { RA, RS} },
2464 { "extsw", XRC(31,986,0), XRB_MASK, PPC, { RA, RS } },
2465 { "extsw.", XRC(31,986,1), XRB_MASK, PPC, { RA, RS } },
2480 { "stw", OP(36), OP_MASK, PPC, { RS, D, RA } },
2481 { "st", OP(36), OP_MASK, POWER, { RS, D, RA } },
2483 { "stwu", OP(37), OP_MASK, PPC, { RS, D, RAS } },
2484 { "stu", OP(37), OP_MASK, POWER, { RS, D, RA } },
2486 { "stb", OP(38), OP_MASK, PPC|POWER, { RS, D, RA } },
2488 { "stbu", OP(39), OP_MASK, PPC|POWER, { RS, D, RAS } },
2498 { "sth", OP(44), OP_MASK, PPC|POWER, { RS, D, RA } },
2500 { "sthu", OP(45), OP_MASK, PPC|POWER, { RS, D, RAS } },
2505 { "stmw", OP(47), OP_MASK, PPC, { RS, D, RA } },
2506 { "stm", OP(47), OP_MASK, POWER, { RS, D, RA } },
2568 { "std", DSO(62,0), DS_MASK, PPC|B64, { RS, DS, RA } },
2570 { "stdu", DSO(62,1), DS_MASK, PPC|B64, { RS, DS, RAS } },