Lines Matching refs:DCRN_CIC_BASE
150 #define DCRN_CIC_BASE 0x030
204 #define DCRN_CICCR (DCRN_CIC_BASE + 0x0) /* CIC Control Register */
205 #define DCRN_DMAS1 (DCRN_CIC_BASE + 0x1) /* DMA Select1 Register */
206 #define DCRN_DMAS2 (DCRN_CIC_BASE + 0x2) /* DMA Select2 Register */
207 #define DCRN_CICVCR (DCRN_CIC_BASE + 0x3) /* CIC Video COntro Register */
208 #define DCRN_CICSEL3 (DCRN_CIC_BASE + 0x5) /* CIC Select 3 Register */
209 #define DCRN_SGPO (DCRN_CIC_BASE + 0x6) /* CIC GPIO Output Register */
210 #define DCRN_SGPOD (DCRN_CIC_BASE + 0x7) /* CIC GPIO OD Register */
211 #define DCRN_SGPTC (DCRN_CIC_BASE + 0x8) /* CIC GPIO Tristate Ctrl Reg */
212 #define DCRN_SGPI (DCRN_CIC_BASE + 0x9) /* CIC GPIO Input Reg */