Lines Matching refs:DCRN_CIC_BASE
133 #define DCRN_CIC_BASE 0x030
193 #define DCRN_CICCR (DCRN_CIC_BASE + 0x0) /* CIC Control Register */
194 #define DCRN_DMAS1 (DCRN_CIC_BASE + 0x1) /* DMA Select1 Register */
195 #define DCRN_DMAS2 (DCRN_CIC_BASE + 0x2) /* DMA Select2 Register */
196 #define DCRN_CICVCR (DCRN_CIC_BASE + 0x3) /* CIC Video COntro Register */
197 #define DCRN_CICSEL3 (DCRN_CIC_BASE + 0x5) /* CIC Select 3 Register */
198 #define DCRN_SGPO (DCRN_CIC_BASE + 0x6) /* CIC GPIO Output Register */
199 #define DCRN_SGPOD (DCRN_CIC_BASE + 0x7) /* CIC GPIO OD Register */
200 #define DCRN_SGPTC (DCRN_CIC_BASE + 0x8) /* CIC GPIO Tristate Ctrl Reg */
201 #define DCRN_SGPI (DCRN_CIC_BASE + 0x9) /* CIC GPIO Input Reg */