Lines Matching refs:irq_desc
87 irq_desc[M32R_IRQ_INT0].status = IRQ_DISABLED;
88 irq_desc[M32R_IRQ_INT0].chip = &mappi_irq_type;
89 irq_desc[M32R_IRQ_INT0].action = NULL;
90 irq_desc[M32R_IRQ_INT0].depth = 1;
96 irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
97 irq_desc[M32R_IRQ_MFT2].chip = &mappi_irq_type;
98 irq_desc[M32R_IRQ_MFT2].action = NULL;
99 irq_desc[M32R_IRQ_MFT2].depth = 1;
105 irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
106 irq_desc[M32R_IRQ_SIO0_R].chip = &mappi_irq_type;
107 irq_desc[M32R_IRQ_SIO0_R].action = NULL;
108 irq_desc[M32R_IRQ_SIO0_R].depth = 1;
113 irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
114 irq_desc[M32R_IRQ_SIO0_S].chip = &mappi_irq_type;
115 irq_desc[M32R_IRQ_SIO0_S].action = NULL;
116 irq_desc[M32R_IRQ_SIO0_S].depth = 1;
121 irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
122 irq_desc[M32R_IRQ_SIO1_R].chip = &mappi_irq_type;
123 irq_desc[M32R_IRQ_SIO1_R].action = NULL;
124 irq_desc[M32R_IRQ_SIO1_R].depth = 1;
129 irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
130 irq_desc[M32R_IRQ_SIO1_S].chip = &mappi_irq_type;
131 irq_desc[M32R_IRQ_SIO1_S].action = NULL;
132 irq_desc[M32R_IRQ_SIO1_S].depth = 1;
139 irq_desc[M32R_IRQ_INT1].status = IRQ_DISABLED;
140 irq_desc[M32R_IRQ_INT1].chip = &mappi_irq_type;
141 irq_desc[M32R_IRQ_INT1].action = NULL;
142 irq_desc[M32R_IRQ_INT1].depth = 1;
147 irq_desc[M32R_IRQ_INT2].status = IRQ_DISABLED;
148 irq_desc[M32R_IRQ_INT2].chip = &mappi_irq_type;
149 irq_desc[M32R_IRQ_INT2].action = NULL;
150 irq_desc[M32R_IRQ_INT2].depth = 1;