Lines Matching refs:csr
98 ctl = &io7->csrs->PO7_LSI_CTL[irq & 0xff].csr; /* assume LSI */
100 ctl = &io7->csrs->PO7_MSI_CTL[((irq - 0x80) >> 5) & 0x0f].csr;
204 volatile unsigned long *csr,
209 val = *csr;
213 *csr = val;
215 *csr;
226 val = io7->csrs->PO7_LSI_CTL[which].csr;
230 io7->csrs->PO7_LSI_CTL[which].csr = val;
232 io7->csrs->PO7_LSI_CTL[which].csr;
243 val = io7->csrs->PO7_MSI_CTL[which].csr;
247 io7->csrs->PO7_MSI_CTL[which].csr = val;
249 io7->csrs->PO7_MSI_CTL[which].csr;
258 io7->csrs->PO7_LSI_CTL[which].csr = ((unsigned long)where << 14);
260 io7->csrs->PO7_LSI_CTL[which].csr;
269 io7->csrs->PO7_MSI_CTL[which].csr = ((unsigned long)where << 14);
271 io7->csrs->PO7_MSI_CTL[which].csr;
299 io7_redirect_irq(io7, &io7->csrs->HLT_CTL.csr, boot_cpuid);
300 io7_redirect_irq(io7, &io7->csrs->HPI_CTL.csr, boot_cpuid);
301 io7_redirect_irq(io7, &io7->csrs->CRD_CTL.csr, boot_cpuid);
302 io7_redirect_irq(io7, &io7->csrs->STV_CTL.csr, boot_cpuid);
303 io7_redirect_irq(io7, &io7->csrs->HEI_CTL.csr, boot_cpuid);
436 io7_redirect_irq(io7, &io7->csrs->HLT_CTL.csr, cpuid);
437 io7_redirect_irq(io7, &io7->csrs->HPI_CTL.csr, cpuid);
438 io7_redirect_irq(io7, &io7->csrs->CRD_CTL.csr, cpuid);
439 io7_redirect_irq(io7, &io7->csrs->STV_CTL.csr, cpuid);
440 io7_redirect_irq(io7, &io7->csrs->HEI_CTL.csr, cpuid);