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  • only in /netgear-WNDR4500-V1.0.1.40_1.0.68/ap/gpl/minidlna/ffmpeg-0.5.1/libswscale/

Lines Matching refs:PREFETCH

32 #undef PREFETCH
47 #define PREFETCH "prefetch"
51 #define PREFETCH "prefetchnta"
55 #define PREFETCH " # nop"
84 __asm__ volatile(PREFETCH" %0"::"m"(*s):"memory");
90 PREFETCH" 32%1 \n\t"
144 __asm__ volatile(PREFETCH" %0"::"m"(*s):"memory");
149 PREFETCH" 32%1 \n\t"
234 __asm__ volatile(PREFETCH" %0"::"m"(*s));
240 PREFETCH" 32%1 \n\t"
283 __asm__ volatile(PREFETCH" %0"::"m"(*s));
290 PREFETCH" 32%1 \n\t"
350 PREFETCH" 32(%1) \n\t"
378 __asm__ volatile(PREFETCH" %0"::"m"(*src):"memory");
386 PREFETCH" 32%1 \n\t"
439 __asm__ volatile(PREFETCH" %0"::"m"(*src):"memory");
448 PREFETCH" 32%1 \n\t"
509 PREFETCH" 32(%1) \n\t"
537 __asm__ volatile(PREFETCH" %0"::"m"(*src):"memory");
545 PREFETCH" 32%1 \n\t"
598 __asm__ volatile(PREFETCH" %0"::"m"(*src):"memory");
607 PREFETCH" 32%1 \n\t"
659 __asm__ volatile(PREFETCH" %0"::"m"(*src):"memory");
668 PREFETCH" 32%1 \n\t"
722 __asm__ volatile(PREFETCH" %0"::"m"(*src):"memory");
731 PREFETCH" 32%1 \n\t"
785 __asm__ volatile(PREFETCH" %0"::"m"(*src):"memory");
794 PREFETCH" 32%1 \n\t"
848 __asm__ volatile(PREFETCH" %0"::"m"(*src):"memory");
857 PREFETCH" 32%1 \n\t"
932 __asm__ volatile(PREFETCH" %0"::"m"(*s):"memory");
937 PREFETCH" 32%1 \n\t"
1074 __asm__ volatile(PREFETCH" %0"::"m"(*s):"memory");
1079 PREFETCH" 32%1 \n\t"
1215 __asm__ volatile(PREFETCH" %0"::"m"(*s):"memory");
1221 PREFETCH" 32%1 \n\t"
1293 __asm__ volatile(PREFETCH" %0"::"m"(*s):"memory");
1299 PREFETCH" 32%1 \n\t"
1364 PREFETCH" (%1, %0) \n\t"
1371 PREFETCH" 32(%1, %0) \n\t"
1432 PREFETCH" 32(%1, %%"REG_a") \n\t"
1503 PREFETCH" 32(%1, %%"REG_a", 2) \n\t"
1504 PREFETCH" 32(%2, %%"REG_a") \n\t"
1505 PREFETCH" 32(%3, %%"REG_a") \n\t"
1655 PREFETCH" 32(%1, %%"REG_a", 2) \n\t"
1656 PREFETCH" 32(%2, %%"REG_a") \n\t"
1657 PREFETCH" 32(%3, %%"REG_a") \n\t"
1786 PREFETCH" 64(%0, %%"REG_a", 4) \n\t"
1839 PREFETCH" 64(%0, %%"REG_a", 4) \n\t"
2024 PREFETCH" 64(%0, %%"REG_a", 4) \n\t"
2077 PREFETCH" 64(%0, %%"REG_a", 4) \n\t"
2156 PREFETCH" 64(%0, %%"REG_d") \n\t"
2230 PREFETCH" 64(%0, %%"REG_d") \n\t"
2231 PREFETCH" 64(%1, %%"REG_d") \n\t"
2446 PREFETCH" 64(%1, %%"REG_a") \n\t"
2447 PREFETCH" 64(%2, %%"REG_a") \n\t"
2465 PREFETCH" 64(%1, %%"REG_a") \n\t"
2466 PREFETCH" 64(%2, %%"REG_a") \n\t"
2523 PREFETCH" %0 \n\t"
2524 PREFETCH" %1 \n\t"
2535 PREFETCH" 32%1 \n\t"
2575 PREFETCH" 32%1 \n\t"
2634 PREFETCH" 32(%1, %0) \n\t"
2635 PREFETCH" 32(%2, %0) \n\t"
2636 PREFETCH" 32(%3, %0) \n\t"