Lines Matching defs:data
154 * ok for this command since the data will just repeat as long as the CS
170 * Writes 511 + 1 bytes to the bus, we have to stuff one data byte into the address.
186 * Write the data into the cache
196 * Construct the address with the first byte of data
209 " move.2 %[tmp], (%[data])2++ \n\t"
210 " shmrg.1 %[tmp], (%[data]), %[tmp] \n\t"
211 " shmrg.1 %[tmp], (%[data])1++, %[tmp] \n\t"
218 " move.4 "D(IO_TX_FIFO)"(%[port]), (%[data])4++ \n\t"
235 " move.4 "D(IO_TX_FIFO)"(%[port]), (%[data])4++ \n\t"
236 " move.4 "D(IO_TX_FIFO)"(%[port]), (%[data])4++ \n\t"
237 " move.4 "D(IO_TX_FIFO)"(%[port]), (%[data])4++ \n\t"
238 " move.4 "D(IO_TX_FIFO)"(%[port]), (%[data])4++ \n\t"
249 [data] "+&a" (buf)
321 uint8_t data;
328 data = ubi32_nand_spi_er_get_feature(0xC0);
329 if (!(data & UBI32_NAND_SPI_ER_STATUS_OIP)) {
336 return data;
487 * Read the data from the chip
557 * Read out the data:
656 printk(KERN_NOTICE "ubi32_nand_spi_er_write: Attempt to write non page aligned data\n");
678 * Write the data
690 * Move the data into the cache
831 * Move the data into the FIFO
1086 * Move the data into the FIFO