Lines Matching refs:GET_CORE_IF
307 dwc_otg_ep_activate(GET_CORE_IF(pcd), &ep->dwc_ep);
339 dwc_otg_ep_deactivate(GET_CORE_IF(ep->pcd), &ep->dwc_ep);
344 dwc_otg_flush_tx_fifo(GET_CORE_IF(ep->pcd), ep->dwc_ep.tx_fifo_num);
345 release_perio_tx_fifo(GET_CORE_IF(ep->pcd), ep->dwc_ep.tx_fifo_num);
346 release_tx_fifo(GET_CORE_IF(ep->pcd), ep->dwc_ep.tx_fifo_num);
455 if (GET_CORE_IF(pcd)->dma_enable) {
490 if (GET_CORE_IF(pcd)->dma_enable) {
557 if (!GET_CORE_IF(pcd)->core_params->opt) {
572 _core_if = GET_CORE_IF(pcd);
654 dwc_otg_ep0_start_transfer(GET_CORE_IF(pcd), &ep->dwc_ep);
658 uint32_t max_transfer = GET_CORE_IF(ep->pcd)->core_params->max_transfer_size;
682 dwc_otg_ep_start_transfer(GET_CORE_IF(pcd), &ep->dwc_ep);
689 if (ep->dwc_ep.is_in && ep->stopped && !(GET_CORE_IF(pcd)->dma_enable)) {
693 if(&GET_CORE_IF(pcd)->multiproc_int_enable) {
694 dwc_modify_reg32(&GET_CORE_IF(pcd)->dev_if->dev_global_regs->diepeachintmsk[ep->dwc_ep.num],
697 dwc_modify_reg32(&GET_CORE_IF(pcd)->dev_if->dev_global_regs->diepmsk, 0, diepmsk.d32);
1302 core_if = GET_CORE_IF(pcd);
1417 dwc_otg_iso_ep_stop_transfer(GET_CORE_IF(pcd), dwc_ep);
1604 dwc_otg_get_frame_number(GET_CORE_IF(pcd));
1612 uint32_t *addr = (uint32_t *)&(GET_CORE_IF(pcd)->core_global_regs->gotgctl);
1635 volatile uint32_t *addr = &(GET_CORE_IF(pcd)->dev_if->dev_global_regs->dctl);
1637 if (dwc_otg_is_device_mode(GET_CORE_IF(pcd))) {
1687 gotgctl.d32 = dwc_read_reg32(&(GET_CORE_IF(pcd)->core_global_regs->gotgctl));
1690 dsts.d32 = dwc_read_reg32(&(GET_CORE_IF(pcd)->dev_if->dev_global_regs->dsts));
1759 if (dwc_otg_is_device_mode(GET_CORE_IF(pcd))) {
1760 dwc_otg_core_dev_init(GET_CORE_IF(pcd));
1818 if ((GET_CORE_IF(pcd)->core_params->phy_type != DWC_PHY_TYPE_PARAM_FS) ||
1819 (!GET_CORE_IF(pcd)->core_params->i2c_enable)) {
1820 if (GET_CORE_IF(pcd)->srp_timer_started) {
1821 GET_CORE_IF(pcd)->srp_timer_started = 0;
1900 GET_CORE_IF(pcd)->srp_timer_started = 1;
1903 srp_timer->data = (unsigned long)GET_CORE_IF(pcd);
2008 uint32_t num_in_eps = (GET_CORE_IF(pcd))->dev_if->num_in_eps;
2009 uint32_t num_out_eps = (GET_CORE_IF(pcd))->dev_if->num_out_eps;
2066 hwcfg1 = (GET_CORE_IF(pcd))->hwcfg1.d32 >> 3;
2117 hwcfg1 = (GET_CORE_IF(pcd))->hwcfg1.d32 >> 2;
2228 core_if = GET_CORE_IF(pcd);
2243 if ((GET_CORE_IF(pcd)->core_params->speed == DWC_SPEED_PARAM_FULL) ||
2244 ((GET_CORE_IF(pcd)->hwcfg2.b.hs_phy_type == 2) &&
2245 (GET_CORE_IF(pcd)->hwcfg2.b.fs_phy_type == 1) &&
2246 (GET_CORE_IF(pcd)->core_params->ulpi_fs_ls))) {
2306 if (GET_CORE_IF(pcd)->dma_enable) {
2324 if (GET_CORE_IF(pcd)->dma_desc_enable) {
2390 dwc_otg_dev_if_t* dev_if = GET_CORE_IF(pcd)->dev_if;
2408 if (GET_CORE_IF(pcd)->dma_enable) {
2411 if (GET_CORE_IF(pcd)->dma_desc_enable) {