Lines Matching refs:dev
508 static int pcie_valid_config(int pcie_port, int bus, int dev)
511 if ((bus == 0) && (dev == 0))
521 if ((bus == 0) && (dev != 0))
535 if ((bus == 1) && (dev != 0))
538 if ((bus >= 3) && (dev != 0))
907 int ifx_pcie_bios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
911 struct ifx_pci_controller *ctrl = dev->bus->sysdata;
914 IFX_PCIE_PRINT(PCIE_MSG_FIXUP, "%s port %d dev %s slot %d pin %d \n", __func__, pcie_port, pci_name(dev), slot, pin);
917 printk(KERN_WARNING "WARNING: dev %s: invalid interrupt pin %d\n", pci_name(dev), pin);
925 IFX_PCIE_PRINT(PCIE_MSG_FIXUP, "%s dev %s irq %d assigned\n", __func__, pci_name(dev), irq);
930 * \fn int ifx_pcie_bios_plat_dev_init(struct pci_dev *dev)
933 * \param[in] dev The Linux PCI device structure for the device to map
937 int ifx_pcie_bios_plat_dev_init(struct pci_dev *dev)
944 pci_read_config_word(dev, PCI_COMMAND, &config);
947 pci_write_config_word(dev, PCI_COMMAND, config);
949 if (dev->subordinate) {
951 pci_write_config_byte(dev, PCI_SEC_LATENCY_TIMER, 0x40); /* XXX, */
953 pci_read_config_word(dev, PCI_BRIDGE_CONTROL, &config);
955 pci_write_config_word(dev, PCI_BRIDGE_CONTROL, config);
958 pos = pci_find_capability(dev, PCI_CAP_ID_EXP);
961 pci_read_config_word(dev, pos + PCI_EXP_RTCTL, &config);
963 pci_write_config_word(dev, pos + PCI_EXP_RTCTL, config);
966 pci_read_config_word(dev, pos + PCI_EXP_DEVSTA, &config);
967 pci_write_config_word(dev, pos + PCI_EXP_DEVSTA, config);
970 pci_read_config_word(dev, pos + PCI_EXP_DEVCTL, &config);
979 pci_write_config_word(dev, pos + PCI_EXP_DEVCTL, config);
983 pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
986 pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS, &dconfig);
987 pci_write_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS, dconfig);
990 pci_write_config_dword(dev, pos + PCI_ERR_UNCOR_MASK, 0);
998 pci_read_config_dword(dev, pos + PCI_ERR_COR_STATUS, &dconfig);
999 pci_write_config_dword(dev, pos + PCI_ERR_COR_STATUS, dconfig);
1002 pci_write_config_dword(dev, pos + PCI_ERR_COR_MASK, 0);
1004 pci_read_config_dword(dev, pos + PCI_ERR_CAP, &dconfig);
1011 pci_write_config_dword(dev, pos + PCI_ERR_CAP, dconfig);
1015 pci_write_config_dword(dev, pos + PCI_ERR_ROOT_COMMAND,
1020 pci_read_config_dword(dev, pos + PCI_ERR_ROOT_STATUS, &dconfig);
1021 pci_write_config_dword(dev, pos + PCI_ERR_ROOT_STATUS, dconfig);
1024 pcie_set_readrq(dev, 128);
1099 extern int (*ltqpci_plat_arch_init)(struct pci_dev *dev);
1100 extern int (*ltqpci_map_irq)(const struct pci_dev *dev, u8 slot, u8 pin);
1114 ltq_gpio_request(&pdev->dev, IFX_PCIE_GPIO_RESET, 0, 1, "pcie-reset");