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  • only in /netgear-R7800-V1.0.2.28/target/linux/lantiq/files/arch/mips/pci/

Lines Matching defs:data

240 	 * The maximum size of any completion with data packet is bounded by the MPS setting 
396 /* Check data link up or not */
624 unsigned int data = 0;
680 data = ifx_pcie_rc_cfg_rd(pcie_port, t);
681 IFX_PCIE_PRINT(PCIE_MSG_READ_CFG, "%s: rd local cfg, offset:%08x, data:%08x\n",
682 __func__, t, data);
686 data = ifx_pcie_cfg_rd(pcie_port, addr);
689 data = le32_to_cpu(data);
693 data = le32_to_cpu(data);
698 data = ifx_pcie_bus_enum_hack(bus, devfn, where, data, pcie_port, 1);
701 IFX_PCIE_PRINT(PCIE_MSG_READ_CFG, "%s: read config: data=%08x raw=%08x\n",
702 __func__, (data >> (8 * (where & 3))) & mask[size & 7], data);
704 *value = (data >> (8 * (where & 3))) & mask[size & 7];
709 static unsigned int ifx_pcie_size_to_value(int where, int size, unsigned int data, unsigned int value)
712 unsigned int tdata = data;
754 unsigned int data;
797 data = ifx_pcie_rc_cfg_rd(pcie_port, t);
798 IFX_PCIE_PRINT(PCIE_MSG_WRITE_CFG,"%s: rd local cfg, offset:%08x, data:%08x\n", __func__, t, data);
800 data = ifx_pcie_size_to_value(where, size, data, tvalue);
802 IFX_PCIE_PRINT(PCIE_MSG_WRITE_CFG,"%s: wr local cfg, offset:%08x, value:%08x\n", __func__, t, data);
803 ifx_pcie_rc_cfg_wr(pcie_port, t, data);
810 data = ifx_pcie_cfg_rd(pcie_port, addr);
813 data = le32_to_cpu(data);
817 data = le32_to_cpu(data);
820 IFX_PCIE_PRINT(PCIE_MSG_WRITE_CFG,"%s: rd cfg, offset:%08x, data:%08x\n", __func__, addr, data);
822 data = ifx_pcie_size_to_value(where, size, data, tvalue);
825 data = cpu_to_le32(data);
829 data = cpu_to_le32(data);
832 IFX_PCIE_PRINT(PCIE_MSG_WRITE_CFG, "%s: wr cfg, offset:%08x, value:%08x\n", __func__, addr, data);
833 ifx_pcie_cfg_wr(pcie_port, addr, data);