Lines Matching defs:data
592 u32 data;
601 REG_RD(smi, RTL8367B_IA_STATUS_REG, &data);
602 if (data & RTL8367B_IA_STATUS_PHY_BUSY)
615 REG_RD(smi, RTL8367B_IA_STATUS_REG, &data);
616 if ((data & RTL8367B_IA_STATUS_PHY_BUSY) == 0)
627 /* read data */
639 u32 data;
651 REG_RD(smi, RTL8367B_IA_STATUS_REG, &data);
652 if (data & RTL8367B_IA_STATUS_PHY_BUSY)
655 /* preapre data */
668 REG_RD(smi, RTL8367B_IA_STATUS_REG, &data);
669 if ((data & RTL8367B_IA_STATUS_PHY_BUSY) == 0)
722 u32 data;
728 REG_RD(smi, RTL8367B_CHIP_RESET_REG, &data);
729 if (!(data & RTL8367B_CHIP_RESET_HW))
915 u32 addr, data;
932 REG_RD(smi, RTL8367B_MIB_CTRL0_REG(0), &data);
934 if (data & RTL8367B_MIB_CTRL0_BUSY_MASK)
937 if (data & RTL8367B_MIB_CTRL0_RESET_MASK)
947 REG_RD(smi, RTL8367B_MIB_COUNTER_REG(offset - i), &data);
948 mibvalue = (mibvalue << 16) | (data & 0xFFFF);
958 u32 data[RTL8367B_TA_VLAN_NUM_WORDS];
973 for (i = 0; i < ARRAY_SIZE(data); i++)
974 REG_RD(smi, RTL8367B_TA_RDDATA_REG(i), &data[i]);
977 vlan4k->member = (data[0] >> RTL8367B_TA_VLAN0_MEMBER_SHIFT) &
979 vlan4k->untag = (data[0] >> RTL8367B_TA_VLAN0_UNTAG_SHIFT) &
981 vlan4k->fid = (data[1] >> RTL8367B_TA_VLAN1_FID_SHIFT) &
990 u32 data[RTL8367B_TA_VLAN_NUM_WORDS];
1000 memset(data, 0, sizeof(data));
1002 data[0] = (vlan4k->member & RTL8367B_TA_VLAN0_MEMBER_MASK) <<
1004 data[0] |= (vlan4k->untag & RTL8367B_TA_VLAN0_UNTAG_MASK) <<
1006 data[1] = (vlan4k->fid & RTL8367B_TA_VLAN1_FID_MASK) <<
1009 for (i = 0; i < ARRAY_SIZE(data); i++)
1010 REG_WR(smi, RTL8367B_TA_WRDATA_REG(i), data[i]);
1025 u32 data[RTL8367B_VLAN_MC_NUM_WORDS];
1034 for (i = 0; i < ARRAY_SIZE(data); i++)
1035 REG_RD(smi, RTL8367B_VLAN_MC_BASE(index) + i, &data[i]);
1037 vlanmc->member = (data[0] >> RTL8367B_VLAN_MC0_MEMBER_SHIFT) &
1039 vlanmc->fid = (data[1] >> RTL8367B_VLAN_MC1_FID_SHIFT) &
1041 vlanmc->vid = (data[3] >> RTL8367B_VLAN_MC3_EVID_SHIFT) &
1050 u32 data[RTL8367B_VLAN_MC_NUM_WORDS];
1062 data[0] = (vlanmc->member & RTL8367B_VLAN_MC0_MEMBER_MASK) <<
1064 data[1] = (vlanmc->fid & RTL8367B_VLAN_MC1_FID_MASK) <<
1066 data[2] = 0;
1067 data[3] = (vlanmc->vid & RTL8367B_VLAN_MC3_EVID_MASK) <<
1070 for (i = 0; i < ARRAY_SIZE(data); i++)
1071 REG_WR(smi, RTL8367B_VLAN_MC_BASE(index) + i, data[i]);
1078 u32 data;
1084 REG_RD(smi, RTL8367B_VLAN_PVID_CTRL_REG(port), &data);
1086 *val = (data >> RTL8367B_VLAN_PVID_CTRL_SHIFT(port)) &
1154 u32 data = 0;
1160 rtl8366_smi_read_reg(smi, RTL8367B_PORT_STATUS_REG(port), &data);
1162 link->link = !!(data & RTL8367B_PORT_STATUS_LINK);
1166 link->duplex = !!(data & RTL8367B_PORT_STATUS_DUPLEX);
1167 link->rx_flow = !!(data & RTL8367B_PORT_STATUS_RXPAUSE);
1168 link->tx_flow = !!(data & RTL8367B_PORT_STATUS_TXPAUSE);
1169 link->aneg = !!(data & RTL8367B_PORT_STATUS_NWAY);
1171 speed = (data & RTL8367B_PORT_STATUS_SPEED_MASK);
1195 u32 data;
1197 rtl8366_smi_read_reg(smi, RTL8367B_SWC0_REG, &data);
1198 val->value.i = (data & RTL8367B_SWC0_MAX_LENGTH_MASK) >>
1464 dev_err(&pdev->dev, "no platform data specified\n");