Lines Matching refs:write
92 void (*write)(struct ar8216_priv *priv, int reg, u32 val);
273 bus->write(bus, 0x18, 0, page);
297 bus->write(bus, 0x18, 0, r3);
300 bus->write(bus, 0x10 | r2, r1, lo);
301 bus->write(bus, 0x10 | r2, r1 + 1, hi);
303 bus->write(bus, 0x10 | r2, r1 + 1, hi);
304 bus->write(bus, 0x10 | r2, r1, lo);
317 bus->write(bus, phy_addr, MII_ATH_DBG_ADDR, dbg_addr);
318 bus->write(bus, phy_addr, MII_ATH_DBG_DATA, dbg_data);
328 bus->write(bus, phy_addr, MII_ATH_MMD_ADDR, addr);
329 bus->write(bus, phy_addr, MII_ATH_MMD_DATA, data);
343 priv->write(priv, reg, v);
370 priv->write(priv, reg, v);
377 priv->write(priv, reg, val);
626 priv->write(priv, AR8216_REG_VTU_DATA, val);
629 priv->write(priv, AR8216_REG_VTU, op);
654 priv->write(priv, AR8216_REG_ATU, AR8216_ATU_OP_FLUSH);
702 priv->write(priv, 0x38, 0xc000050e);
712 priv->write(priv, AR8216_REG_PORT_CTRL(port),
716 priv->write(priv, AR8216_REG_PORT_VLAN(port), 0);
719 priv->write(priv, AR8216_REG_PORT_STATUS(port),
729 priv->write(priv, AR8216_REG_PORT_STATUS(port),
855 priv->write(priv, 0x8, newval);
888 priv->write(priv, 0x38, 0xc000050e);
891 priv->write(priv, AR8216_REG_FLOOD_MASK, 0x003f003f);
1173 priv->write(priv, AR8327_REG_PAD0_MODE, t);
1175 priv->write(priv, AR8327_REG_PAD5_MODE, t);
1177 priv->write(priv, AR8327_REG_PAD6_MODE, t);
1189 priv->write(priv, AR8327_REG_LED_CTRL0, led_cfg->led_ctrl0);
1190 priv->write(priv, AR8327_REG_LED_CTRL1, led_cfg->led_ctrl1);
1191 priv->write(priv, AR8327_REG_LED_CTRL2, led_cfg->led_ctrl2);
1192 priv->write(priv, AR8327_REG_LED_CTRL3, led_cfg->led_ctrl3);
1197 priv->write(priv, AR8327_REG_POWER_ON_STRIP, new_pos);
1225 priv->write(priv, AR8327_REG_FWD_CTRL0, t);
1231 priv->write(priv, AR8327_REG_FWD_CTRL1, t);
1290 priv->write(priv, AR8327_REG_PORT_STATUS(port),
1311 priv->write(priv, AR8327_REG_PORT_STATUS(port), t);
1331 priv->write(priv, AR8327_REG_PORT_STATUS(port), t);
1334 priv->write(priv, AR8327_REG_PORT_HEADER(port), 0);
1336 priv->write(priv, AR8327_REG_PORT_VLAN0(port), 0);
1339 priv->write(priv, AR8327_REG_PORT_VLAN1(port), t);
1343 priv->write(priv, AR8327_REG_PORT_LOOKUP(port), t);
1360 priv->write(priv, AR8327_REG_ATU_FUNC,
1383 priv->write(priv, AR8327_REG_ATU_DATA0, reg[0]);
1384 priv->write(priv, AR8327_REG_ATU_DATA1, reg[1]);
1385 priv->write(priv, AR8327_REG_ATU_DATA2, reg[2]);
1386 priv->write(priv, AR8327_REG_ATU_FUNC, reg[3]);
1431 priv->write(priv, AR8327_REG_FWD_CTRL1, reg);
1435 priv->write(priv, AR8327_REG_ARL_CTRL, reg);
1437 priv->write(priv, AR8327_REG_FRAME_ACK_CTRL0, 0x07070707);
1438 priv->write(priv, AR8327_REG_FRAME_ACK_CTRL1, 0x00070707 | AR8327_FRAME_ACK_CTRL1_IGMP_V3_EN);
1444 priv->write(priv, AR8327_REG_FWD_CTRL1, reg);
1448 priv->write(priv, AR8327_REG_ARL_CTRL, reg);
1450 priv->write(priv, AR8327_REG_FRAME_ACK_CTRL0, 0x0);
1451 priv->write(priv, AR8327_REG_FRAME_ACK_CTRL1, 0x0);
1465 priv->write(priv, AR8327_REG_VTU_FUNC0, val);
1468 priv->write(priv, AR8327_REG_VTU_FUNC1, op);
1512 priv->write(priv, AR8327_REG_PORT_VLAN0(port), t);
1529 priv->write(priv, AR8327_REG_PORT_VLAN1(port), t);
1535 priv->write(priv, AR8327_REG_PORT_LOOKUP(port), t);
2260 priv->write = ar8216_mii_write;