Lines Matching defs:sc
114 static int dma_map_skb(struct ubsec_softc *sc,
116 static int dma_map_uio(struct ubsec_softc *sc,
118 static void dma_unmap(struct ubsec_softc *sc,
120 static int ubsec_dmamap_aligned(struct ubsec_softc *sc,
149 #define READ_REG(sc,r) \
150 ssb_read32((sc)->sdev, (r));
151 #define WRITE_REG(sc,r,val) \
152 ssb_write32((sc)->sdev, (r), (val));
216 struct ubsec_softc *sc = ubsec_chip_idx[i];
218 stat = READ_REG(sc, BS_STAT);
219 ctrl = READ_REG(sc, BS_CTRL);
230 if (!BSD_SIMPLEQ_EMPTY(&sc->sc_qchip)) {
231 BSD_SIMPLEQ_FOREACH(q, &sc->sc_qchip, q_next)
252 dma_map_skb(struct ubsec_softc *sc, struct ubsec_dma_alloc* q_map, struct sk_buff *skb, int *mlen)
275 tmp = dma_map_single(sc->sc_dv,
304 tmp = dma_map_single(sc->sc_dv,
336 dma_map_uio(struct ubsec_softc *sc, struct ubsec_dma_alloc *q_map, struct uio *uio, int *mlen)
359 tmp = dma_map_single(sc->sc_dv,
386 dma_unmap(struct ubsec_softc *sc, struct ubsec_dma_alloc *q_map, int mlen)
399 dma_unmap_single(sc->sc_dv,
413 ubsec_dmamap_aligned(struct ubsec_softc *sc, const struct ubsec_dma_alloc *q_map, int mlen)
558 struct ubsec_softc *sc;
575 sc = (struct ubsec_softc *)ssb_get_drvdata(sdev);
578 crypto_unregister_all(sc->sc_cid);
584 q = sc->sc_queuea[i];
590 ubsec_dma_free(sc, &dmap->d_alloc);
595 sc->sc_queuea[i] = NULL;
614 struct ubsec_softc *sc = NULL;
623 sc = (struct ubsec_softc *) kmalloc(sizeof(*sc), GFP_KERNEL);
624 if (!sc)
626 memset(sc, 0, sizeof(*sc));
628 sc->sc_dv = sdev->dev;
629 sc->sdev = sdev;
631 spin_lock_init(&sc->sc_ringmtx);
633 softc_device_init(sc, "ubsec_ssb", num_chips, ubsec_ssb_methods);
637 ubsec_chip_idx[device_get_unit(sc->sc_dev)] = sc;
641 ssb_set_drvdata(sdev, sc);
643 BSD_SIMPLEQ_INIT(&sc->sc_queue);
644 BSD_SIMPLEQ_INIT(&sc->sc_qchip);
645 BSD_SIMPLEQ_INIT(&sc->sc_queue2);
646 BSD_SIMPLEQ_INIT(&sc->sc_qchip2);
647 BSD_SIMPLEQ_INIT(&sc->sc_q2free);
649 sc->sc_statmask = BS_STAT_MCR1_DONE | BS_STAT_DMAERR;
651 sc->sc_cid = crypto_get_driverid(softc_get_device(sc), CRYPTOCAP_F_HARDWARE);
652 if (sc->sc_cid < 0) {
653 device_printf(sc->sc_dev, "could not get crypto driver id\n");
657 BSD_SIMPLEQ_INIT(&sc->sc_freequeue);
658 dmap = sc->sc_dmaa;
668 if (ubsec_dma_malloc(sc, &dmap->d_alloc, sizeof(struct ubsec_dmachunk),0)) {
676 sc->sc_queuea[i] = q;
678 BSD_SIMPLEQ_INSERT_TAIL(&sc->sc_freequeue, q, q_next);
684 ubsec_reset_board(sc);
689 ubsec_init_board(sc);
692 crypto_register(sc->sc_cid, CRYPTO_3DES_CBC, 0, 0);
693 crypto_register(sc->sc_cid, CRYPTO_DES_CBC, 0, 0);
695 if (sc->sc_flags & UBS_FLAGS_AES) {
696 crypto_register(sc->sc_cid, CRYPTO_AES_CBC, 0, 0);
702 crypto_register(sc->sc_cid, CRYPTO_MD5_HMAC, 0, 0);
703 crypto_register(sc->sc_cid, CRYPTO_SHA1_HMAC, 0, 0);
714 struct ubsec_softc *sc = NULL;
724 sc = (struct ubsec_softc *)ssb_get_drvdata(arg);
726 stat = READ_REG(sc, BS_STAT);
728 stat &= sc->sc_statmask;
732 WRITE_REG(sc, BS_STAT, stat); /* IACK */
738 while (!BSD_SIMPLEQ_EMPTY(&sc->sc_qchip)) {
739 q = BSD_SIMPLEQ_FIRST(&sc->sc_qchip);
748 BSD_SIMPLEQ_REMOVE_HEAD(&sc->sc_qchip, q_next);
758 ubsec_callback(sc, q->q_stacked_mcr[i]);
762 ubsec_callback(sc, q);
770 ubsec_feed(sc);
779 volatile u_int32_t a = READ_REG(sc, BS_ERR);
785 ubsec_totalreset(sc);
786 ubsec_feed(sc);
797 ubsec_feed(struct ubsec_softc *sc)
807 npkts = sc->sc_nqueue;
813 stat = READ_REG(sc, BS_STAT);
817 ubsec_totalreset(sc);
833 q = BSD_SIMPLEQ_FIRST(&sc->sc_queue);
834 BSD_SIMPLEQ_REMOVE_HEAD(&sc->sc_queue, q_next);
835 --sc->sc_nqueue;
843 bus_dmamap_sync(sc->sc_dmat, q->q_src_map,
846 bus_dmamap_sync(sc->sc_dmat, q->q_dst_map,
853 q2 = BSD_SIMPLEQ_FIRST(&sc->sc_queue);
856 bus_dmamap_sync(sc->sc_dmat, q2->q_src_map,
859 bus_dmamap_sync(sc->sc_dmat, q2->q_dst_map,
862 BSD_SIMPLEQ_REMOVE_HEAD(&sc->sc_queue, q_next);
863 --sc->sc_nqueue;
871 BSD_SIMPLEQ_INSERT_TAIL(&sc->sc_qchip, q, q_next);
873 bus_dmamap_sync(sc->sc_dmat, q->q_dma->d_alloc.dma_map,
877 WRITE_REG(sc, BS_MCR1, q->q_dma->d_alloc.dma_paddr +
888 while (!BSD_SIMPLEQ_EMPTY(&sc->sc_queue)) {
889 stat = READ_REG(sc, BS_STAT);
893 ubsec_totalreset(sc);
899 q = BSD_SIMPLEQ_FIRST(&sc->sc_queue);
902 bus_dmamap_sync(sc->sc_dmat, q->q_src_map,
905 bus_dmamap_sync(sc->sc_dmat, q->q_dst_map,
907 bus_dmamap_sync(sc->sc_dmat, q->q_dma->d_alloc.dma_map,
912 WRITE_REG(sc, BS_MCR1, q->q_dma->d_alloc.dma_paddr +
920 BSD_SIMPLEQ_REMOVE_HEAD(&sc->sc_queue, q_next);
921 --sc->sc_nqueue;
922 BSD_SIMPLEQ_INSERT_TAIL(&sc->sc_qchip, q, q_next);
935 struct ubsec_softc *sc = NULL;
946 sc = device_get_softc(dev);
948 if (sc == NULL)
969 if (sc->sc_sessions == NULL) {
970 ses = sc->sc_sessions = (struct ubsec_session *)kmalloc(
976 sc->sc_nsessions = 1;
978 for (sesn = 0; sesn < sc->sc_nsessions; sesn++) {
979 if (sc->sc_sessions[sesn].ses_used == 0) {
980 ses = &sc->sc_sessions[sesn];
986 sesn = sc->sc_nsessions;
992 bcopy(sc->sc_sessions, ses, sesn *
994 bzero(sc->sc_sessions, sesn *
996 kfree(sc->sc_sessions);
997 sc->sc_sessions = ses;
998 ses = &sc->sc_sessions[sesn];
999 sc->sc_nsessions++;
1068 *sidp = UBSEC_SID(device_get_unit(sc->sc_dev), sesn);
1078 struct ubsec_softc *sc = device_get_softc(dev);
1086 if (sc == NULL)
1090 if (session < sc->sc_nsessions) {
1091 bzero(&sc->sc_sessions[session], sizeof(sc->sc_sessions[session]));
1102 struct ubsec_softc *sc = device_get_softc(dev);
1121 if (unlikely(sc == NULL))
1127 spin_lock_irqsave(&sc->sc_ringmtx, flags);
1128 //spin_lock_irq(&sc->sc_ringmtx);
1130 if (BSD_SIMPLEQ_EMPTY(&sc->sc_freequeue)) {
1135 spin_unlock_irqrestore(&sc->sc_ringmtx, flags);
1136 //spin_unlock_irq(&sc->sc_ringmtx);
1141 q = BSD_SIMPLEQ_FIRST(&sc->sc_freequeue);
1142 BSD_SIMPLEQ_REMOVE_HEAD(&sc->sc_freequeue, q_next);
1146 spin_unlock_irqrestore(&sc->sc_ringmtx, flags);
1147 //spin_unlock_irq(&sc->sc_ringmtx);
1155 ses = &sc->sc_sessions[q->q_sesn];
1377 if (bus_dmamap_create(sc->sc_dmat, 0xfff0, UBS_MAX_SCATTER,
1386 if (bus_dmamap_load_mbuf(sc->sc_dmat, q->q_src_map,
1388 bus_dmamap_destroy(sc->sc_dmat, q->q_src_map);
1394 err = dma_map_skb(sc, q->q_src_map, q->q_src_m, &q->q_src_len);
1400 if (bus_dmamap_load_uio(sc->sc_dmat, q->q_src_map,
1402 bus_dmamap_destroy(sc->sc_dmat, q->q_src_map);
1408 err = dma_map_uio(sc, q->q_src_map, q->q_src_io, &q->q_src_len);
1416 nicealign = ubsec_dmamap_aligned(sc, q->q_src_map, q->q_src_len);
1490 if (bus_dmamap_create(sc->sc_dmat, 0xfff0,
1496 if (bus_dmamap_load_uio(sc->sc_dmat, q->q_dst_map,
1498 bus_dmamap_destroy(sc->sc_dmat, q->q_dst_map);
1573 if (bus_dmamap_create(sc->sc_dmat, 0xfff0,
1579 if (bus_dmamap_load_mbuf(sc->sc_dmat,
1582 bus_dmamap_destroy(sc->sc_dmat,
1589 device_printf(sc->sc_dev,
1661 if (sc->sc_flags & UBS_FLAGS_LONGCTX) {
1787 spin_lock_irqsave(&sc->sc_ringmtx, flags);
1788 //spin_lock_irq(&sc->sc_ringmtx);
1790 BSD_SIMPLEQ_INSERT_TAIL(&sc->sc_queue, q, q_next);
1791 sc->sc_nqueue++;
1794 ubsec_feed(sc);
1799 spin_unlock_irqrestore(&sc->sc_ringmtx, flags);
1800 //spin_unlock_irq(&sc->sc_ringmtx);
1813 bus_dmamap_unload(sc->sc_dmat, q->q_dst_map);
1814 bus_dmamap_destroy(sc->sc_dmat, q->q_dst_map);
1816 dma_unmap(sc, q->q_dst_map, q->q_dst_len);
1820 bus_dmamap_unload(sc->sc_dmat, q->q_src_map);
1821 bus_dmamap_destroy(sc->sc_dmat, q->q_src_map);
1823 dma_unmap(sc, q->q_src_map, q->q_src_len);
1829 spin_lock_irqsave(&sc->sc_ringmtx, flags);
1830 //spin_lock_irq(&sc->sc_ringmtx);
1832 BSD_SIMPLEQ_INSERT_TAIL(&sc->sc_freequeue, q, q_next);
1837 spin_unlock_irqrestore(&sc->sc_ringmtx, flags);
1838 //spin_unlock_irq(&sc->sc_ringmtx);
1857 ubsec_callback(struct ubsec_softc *sc, struct ubsec_q *q)
1872 bus_dmamap_sync(sc->sc_dmat, dmap->d_alloc.dma_map, 0,
1876 bus_dmamap_sync(sc->sc_dmat, q->q_dst_map,
1878 bus_dmamap_unload(sc->sc_dmat, q->q_dst_map);
1879 bus_dmamap_destroy(sc->sc_dmat, q->q_dst_map);
1881 bus_dmamap_sync(sc->sc_dmat, q->q_src_map,
1883 bus_dmamap_unload(sc->sc_dmat, q->q_src_map);
1884 bus_dmamap_destroy(sc->sc_dmat, q->q_src_map);
1888 dma_unmap(sc, q->q_dst_map, q->q_dst_len);
1890 dma_unmap(sc, q->q_src_map, q->q_src_len);
1916 (caddr_t)sc->sc_sessions[q->q_sesn].ses_iv);
1920 (caddr_t)sc->sc_sessions[q->q_sesn].ses_iv);
1926 (caddr_t)sc->sc_sessions[q->q_sesn].ses_iv);
1930 (caddr_t)sc->sc_sessions[q->q_sesn].ses_iv);
1955 sc->sc_sessions[q->q_sesn].ses_mlen,
1964 BSD_SIMPLEQ_INSERT_TAIL(&sc->sc_freequeue, q, q_next);
2006 ubsec_dma_malloc(struct ubsec_softc *sc, struct ubsec_dma_alloc *dma,
2009 dma->dma_vaddr = dma_alloc_coherent(sc->sc_dv,
2024 ubsec_dma_free(struct ubsec_softc *sc, struct ubsec_dma_alloc *dma)
2026 dma_free_coherent(sc->sc_dv, dma->dma_size, dma->dma_vaddr,
2035 ubsec_reset_board(struct ubsec_softc *sc)
2044 ctrl = READ_REG(sc, BS_CTRL);
2046 WRITE_REG(sc, BS_CTRL, ctrl);
2058 ubsec_init_board(struct ubsec_softc *sc)
2067 ctrl = READ_REG(sc, BS_CTRL);
2071 WRITE_REG(sc, BS_CTRL, ctrl);
2074 sc->sc_flags |= UBS_FLAGS_LONGCTX | UBS_FLAGS_AES;
2082 ubsec_cleanchip(struct ubsec_softc *sc)
2091 while (!BSD_SIMPLEQ_EMPTY(&sc->sc_qchip)) {
2092 q = BSD_SIMPLEQ_FIRST(&sc->sc_qchip);
2093 BSD_SIMPLEQ_REMOVE_HEAD(&sc->sc_qchip, q_next);
2094 ubsec_free_q(sc, q);
2103 ubsec_free_q(struct ubsec_softc *sc, struct ubsec_q *q)
2129 BSD_SIMPLEQ_INSERT_TAIL(&sc->sc_freequeue, q2, q_next);
2150 BSD_SIMPLEQ_INSERT_TAIL(&sc->sc_freequeue, q, q_next);
2162 ubsec_totalreset(struct ubsec_softc *sc)
2169 ubsec_reset_board(sc);
2170 ubsec_init_board(sc);
2171 ubsec_cleanchip(sc);