Lines Matching defs:data
84 * has its DRAM on DIMMs it will use its EEPROM to extract SPD data
225 MV_U8 data[SPD_SIZE];
228 memset(data, 0, SPD_SIZE);
239 &twsiSlave, data, SPD_SIZE) )
251 spdChecksum += data[i];
254 if ((spdChecksum & 0xff) != data[63])
257 (MV_U32)(spdChecksum & 0xff), data[63]));
275 &twsiSlave, &data[i], 1) )
310 MV_U8 data[SPD_SIZE];
319 memset(data, 0, SPD_SIZE);
331 &twsiSlave, data, SPD_SIZE) )
343 spdChecksum += data[i];
346 if ((spdChecksum & 0xff) != data[63])
349 (MV_U32)(spdChecksum & 0xff), data[63]));
359 pDimmInfo->spdRawData[i] = data[i];
360 DB(mvOsPrintf("SPD-EEPROM Byte %3d = %3x (%3d)\n",i, data[i], data[i]));
366 switch (data[DIMM_MEM_TYPE])
387 pDimmInfo->numOfRowAddr = data[DIMM_ROW_NUM];
391 pDimmInfo->numOfColAddr = data[DIMM_COL_NUM];
395 pDimmInfo->numOfModuleBanks = data[DIMM_MODULE_BANK_NUM];
404 pDimmInfo->dataWidth = data[DIMM_DATA_WIDTH];
408 pDimmInfo->minCycleTimeAtMaxCasLatPs = cas2ps(data[DIMM_MIN_CC_AT_MAX_CAS]);
411 pDimmInfo->errorCheckType = data[DIMM_ERR_CHECK_TYPE];
416 pDimmInfo->refreshInterval = data[DIMM_REFRESH_INTERVAL];
421 pDimmInfo->sdramWidth = data[DIMM_SDRAM_WIDTH];
425 pDimmInfo->errorCheckDataWidth = data[DIMM_ERR_CHECK_DATA_WIDTH];
443 pDimmInfo->burstLengthSupported = data[DIMM_BURST_LEN_SUP];
448 pDimmInfo->numOfBanksOnEachDevice = data[DIMM_DEV_BANK_NUM];
475 pDimmInfo->suportedCasLatencies = data[DIMM_SUP_CAL];
482 pDimmInfo->dimmTypeInfo = data[DIMM_DDR2_TYPE_INFORMATION];
488 pDimmInfo->dimmAttributes = data[DIMM_BUF_ADDR_CONT_IN];
494 cas2ps(data[DIMM_MIN_CC_AT_MAX_CAS_MINUS1]);
498 cas2ps(data[DIMM_MIN_CC_AT_MAX_CAS_MINUS2]);
500 pDimmInfo->minRowPrechargeTime = data[DIMM_MIN_ROW_PRECHARGE_TIME];
503 pDimmInfo->minRowActiveToRowActive = data[DIMM_MIN_ROW_ACTIVE_TO_ROW_ACTIVE];
506 pDimmInfo->minRasToCasDelay = data[DIMM_MIN_RAS_TO_CAS_DELAY];
509 pDimmInfo->minRasPulseWidth = data[DIMM_MIN_RAS_PULSE_WIDTH];
514 pDimmInfo->dimmBankDensity = data[DIMM_BANK_DENSITY];
519 pDimmInfo->minWriteRecoveryTime = data[DIMM_MIN_WRITE_RECOVERY_TIME];
524 pDimmInfo->minWriteToReadCmdDelay = data[DIMM_MIN_WRITE_TO_READ_CMD_DELAY];
529 pDimmInfo->minReadToPrechCmdDelay = data[DIMM_MIN_READ_TO_PRECH_CMD_DELAY];
534 pDimmInfo->minRefreshToActiveCmd = data[DIMM_MIN_REFRESH_TO_ACTIVATE_CMD];
700 /* go over the first 35 I2C data bytes */