Lines Matching refs:temp
388 u32 temp;
406 temp = *p;
408 temp = ((temp & 0xffff)<<16) + ((temp & 0xffff0000)>>16);
409 meiLongwordWrite(MEI_DATA_XFR, temp);
424 u32 temp;
442 temp = *p;
443 temp = ((temp & 0xffff)<<16) + ((temp & 0xffff0000)>>16);//swap half word
444 meiLongwordWrite(MEI_DATA_XFR, temp);
459 u32 temp;
477 temp = *p;
478 temp = ((temp & 0xff)<<24) + ((temp & 0xff00)<<8)+ ((temp & 0xff0000)>>8)+ ((temp & 0xff000000)>>24);//swap byte
479 meiLongwordWrite(MEI_DATA_XFR, temp);
494 u32 temp;
512 meiLongwordRead(MEI_DATA_XFR, &temp);
514 temp = ((temp & 0xffff)<<16) + ((temp & 0xffff0000)>>16);
515 *p=temp;
530 u32 temp;
548 meiLongwordRead(MEI_DATA_XFR, &temp);
549 temp = ((temp & 0xffff)<<16) + ((temp & 0xffff0000)>>16);
550 *p=temp;
565 u32 temp;
583 meiLongwordRead(MEI_DATA_XFR, &temp);
584 temp = ((temp & 0xff)<<24) + ((temp & 0xff00)<<8)+ ((temp & 0xff0000)>>8)+ ((temp & 0xff000000)>>24);//swap byte
585 *p=temp;
621 u32 temp = 0x0;
633 meiLongwordRead(MEI_CONTROL, &temp);
635 temp |= (HOST_MSTR);
636 meiLongwordWrite(MEI_CONTROL, temp);
648 temp=*buffer;
649 temp = ((temp & 0xff)<<24) + ((temp & 0xff00)<<8)+ ((temp & 0xff0000)>>8)+ ((temp & 0xff000000)>>24);//swap byte
650 meiLongwordWrite(MEI_DEBUG_DATA, temp);
658 meiLongwordRead(MEI_CONTROL, &temp);
660 temp &= ~(HOST_MSTR);
661 meiLongwordWrite(MEI_CONTROL, temp);
676 u32 temp = 0x0;
688 meiLongwordRead(MEI_CONTROL, &temp);
690 temp |= (HOST_MSTR);
691 meiLongwordWrite(MEI_CONTROL, temp);
704 meiLongwordRead(MEI_DEBUG_DATA, &temp);
706 temp = ((temp & 0xff)<<24) + ((temp & 0xff00)<<8)+ ((temp & 0xff0000)>>8)+ ((temp & 0xff000000)>>24);//swap byte
707 *buffer=temp;
713 meiLongwordRead(MEI_CONTROL, &temp);
715 temp &= ~(HOST_MSTR);
716 meiLongwordWrite(MEI_CONTROL, temp);
731 u32 temp = 0x0;
743 meiLongwordRead(MEI_CONTROL, &temp);
745 temp |= (HOST_MSTR);
746 meiLongwordWrite(MEI_CONTROL, temp);
758 temp=*buffer;
759 temp = ((temp & 0xffff)<<16) + ((temp & 0xffff0000)>>16);//swap half word
760 meiLongwordWrite(MEI_DEBUG_DATA, temp);
768 meiLongwordRead(MEI_CONTROL, &temp);
770 temp &= ~(HOST_MSTR);
771 meiLongwordWrite(MEI_CONTROL, temp);
786 u32 temp = 0x0;
798 meiLongwordRead(MEI_CONTROL, &temp);
800 temp |= (HOST_MSTR);
801 meiLongwordWrite(MEI_CONTROL, temp);
814 meiLongwordRead(MEI_DEBUG_DATA, &temp);
816 temp = ((temp & 0xffff)<<16) + ((temp & 0xffff0000)>>16);//swap half word
817 *buffer=temp;
823 meiLongwordRead(MEI_CONTROL, &temp);
825 temp &= ~(HOST_MSTR);
826 meiLongwordWrite(MEI_CONTROL, temp);
841 u32 temp = 0x0;
853 meiLongwordRead(MEI_CONTROL, &temp);
855 temp |= (HOST_MSTR);
856 meiLongwordWrite(MEI_CONTROL, temp);
868 temp=*buffer;
869 meiLongwordWrite(MEI_DEBUG_DATA, temp);
877 meiLongwordRead(MEI_CONTROL, &temp);
879 temp &= ~(HOST_MSTR);
880 meiLongwordWrite(MEI_CONTROL, temp);
895 u32 temp = 0x0;
907 meiLongwordRead(MEI_CONTROL, &temp);
909 temp |= (HOST_MSTR);
910 meiLongwordWrite(MEI_CONTROL, temp);
923 meiLongwordRead(MEI_DEBUG_DATA, &temp);
925 *buffer=temp;
931 meiLongwordRead(MEI_CONTROL, &temp);
933 temp &= ~(HOST_MSTR);
934 meiLongwordWrite(MEI_CONTROL, temp);
961 u32 temp=0;
973 meiMailboxError = meiDMAWrite(MEI_TO_ARC_MAILBOXR, (u32 *)(&temp), 1);
1076 u32 temp;
1093 meiLongwordRead(MEI_DEBUG_DATA, &temp);
1094 temp |=arc_debug_data;
1097 meiLongwordWrite(MEI_DEBUG_DATA, temp);
1758 u32 temp;
1771 meiDebugRead_8(0x30f20, &temp, 1);
1773 meiDMARead_8(0x30f20, &temp, 1);
1775 if((temp&0x4000)!=0){
1778 meiDebugWrite_8(0x30f20, &temp, 1);
1780 meiDMAWrite_8(0x30f20, &temp, 1);
1783 meiDebugRead_8(0x30f20, &temp, 1);
1785 meiDMARead_8(0x30f20, &temp, 1);
1787 if((temp&0x4000)!=0)
1794 meiDebugRead_16(pcm_start_addr+i*16+12, &temp, 1);
1796 meiDMARead_16(pcm_start_addr+i*16+12, &temp, 1);
1798 wrindex = (u16)((temp & 0xffff0000)>>16);
1801 meiDebugRead_16(pcm_start_addr+i*16+8, &temp, 1);
1803 meiDMARead_16(pcm_start_addr+i*16+8, &temp, 1);
1805 rdindex = (u16)(temp & 0xffff);
1867 meiDebugRead_16(pcm_start_addr+i*16+8, &temp, 1);
1869 meiDMARead_16(pcm_start_addr+i*16+8, &temp, 1);
1871 temp= (temp & 0xffff0000) + rdindex;
1873 meiDebugWrite_16(pcm_start_addr+i*16+8, &temp, 1); // update rdindex
1875 meiDMAWrite_16(pcm_start_addr+i*16+8, &temp, 1); // update rdindex
1919 meiDebugRead_16(pcm_start_addr+i*16+12, &temp, 1);
1921 meiDMARead_16(pcm_start_addr+i*16+12, &temp, 1);
1923 temp=(temp&0xffff) + (wrindex<<16);
1925 meiDebugWrite_16(pcm_start_addr+i*16+12, &temp, 1); // update wrindex
1927 meiDMAWrite_16(pcm_start_addr+i*16+12, &temp, 1); // update wrindex
2049 u32 temp;
3607 temp = (u32)(RxMessage[4]) + (((u32)(RxMessage[5]))<<16);
3608 if((AlarmConfProfile.adslAtucThreshFastRateUp!=0) && (temp>=PrevTxRate.adslAtucChanPrevTxRate+AlarmConfProfile.adslAtucThreshFastRateUp)){
3610 PrevTxRate.adslAtucChanPrevTxRate = temp;
3612 if((AlarmConfProfile.adslAtucThreshFastRateDown!=0) && (temp<=PrevTxRate.adslAtucChanPrevTxRate-AlarmConfProfile.adslAtucThreshFastRateDown)){
3614 PrevTxRate.adslAtucChanPrevTxRate = temp;
3628 temp = (u32)(RxMessage[4]) + (((u32)(RxMessage[5]))<<16);
3629 if((AlarmConfProfile.adslAtucThreshInterleaveRateUp!=0) && (temp>=PrevTxRate.adslAtucChanPrevTxRate+AlarmConfProfile.adslAtucThreshInterleaveRateUp)){
3631 PrevTxRate.adslAtucChanPrevTxRate = temp;
3633 if((AlarmConfProfile.adslAtucThreshInterleaveRateDown!=0) && (temp<=PrevTxRate.adslAtucChanPrevTxRate-AlarmConfProfile.adslAtucThreshInterleaveRateDown)){
3635 PrevTxRate.adslAtucChanPrevTxRate = temp;
3657 temp = (u32)(RxMessage[4]) + (((u32)(RxMessage[5]))<<16);
3658 if((AlarmConfProfile.adslAturThreshFastRateUp!=0) && (temp>=PrevTxRate.adslAturChanPrevTxRate+AlarmConfProfile.adslAturThreshFastRateUp)){
3660 PrevTxRate.adslAturChanPrevTxRate = temp;
3662 if((AlarmConfProfile.adslAturThreshFastRateDown!=0) && (temp<=PrevTxRate.adslAturChanPrevTxRate-AlarmConfProfile.adslAturThreshFastRateDown)){
3664 PrevTxRate.adslAturChanPrevTxRate = temp;
3678 temp = (u32)(RxMessage[4]) + (((u32)(RxMessage[5]))<<16);
3679 if((AlarmConfProfile.adslAturThreshInterleaveRateUp!=0) && (temp>=PrevTxRate.adslAturChanPrevTxRate+AlarmConfProfile.adslAturThreshInterleaveRateUp)){
3681 PrevTxRate.adslAturChanPrevTxRate = temp;
3683 if((AlarmConfProfile.adslAturThreshInterleaveRateDown!=0) && (temp<=PrevTxRate.adslAturChanPrevTxRate-AlarmConfProfile.adslAturThreshInterleaveRateDown)){
3685 PrevTxRate.adslAturChanPrevTxRate = temp;
5470 temp=RxMessage[4];
5484 pts.adslPowerSpectralDensity_pt->ACTPSDus = ((int )(j*256 - temp*10*256 + k*10)) /256;
5488 j=temp=temp2=0;
5507 temp=RxMessage[4];
5522 pts.adslPowerSpectralDensity_pt->ACTPSDds = ((int )(j*256 - temp*10*256 + k*10)) /256;
5657 temp = RxMessage[4]-mib_pread.ATUC_PERF_ESS;
5658 if(temp>=0){
5659 current_intvl->AtucPerfEs+=temp;
5660 ATUC_PERF_ESS+=temp;
5703 temp = RxMessage[4]-mib_pread.ATUR_PERF_ESS;
5704 if(temp>=0){
5705 current_intvl->AturPerfEs+=temp;
5706 ATUR_PERF_ESS+=temp;
5723 temp = RxMessage[4];
5734 if((temp + (temp2<<16) - mib_pread.ATUR_CHAN_RECV_BLK)>=0){
5735 current_intvl->AturChanPerfRxBlk+=temp + (temp2<<16) - mib_pread.ATUR_CHAN_RECV_BLK;
5736 ATUR_CHAN_RECV_BLK+=temp + (temp2<<16) - mib_pread.ATUR_CHAN_RECV_BLK;
5737 mib_pread.ATUR_CHAN_RECV_BLK = temp + (temp2<<16);
5740 current_intvl->AturChanPerfRxBlk+=0xffffffff - mib_pread.ATUR_CHAN_RECV_BLK +(temp + (temp2<<16));
5741 ATUR_CHAN_RECV_BLK+=0xffffffff - mib_pread.ATUR_CHAN_RECV_BLK +(temp + (temp2<<16));
5742 mib_pread.ATUR_CHAN_RECV_BLK = temp + (temp2<<16);
5774 temp = RxMessage[4] - mib_pread.ATUR_CHAN_CORR_BLK_INTL;
5775 if(temp>=0){
5776 current_intvl->AturChanPerfCorrBlk+=temp;
5777 ATUR_CHAN_CORR_BLK+=temp;
5795 temp = RxMessage[4] - mib_pread.ATUR_CHAN_CORR_BLK_FAST;
5796 if(temp>=0){
5797 current_intvl->AturChanPerfCorrBlk+=temp;
5798 ATUR_CHAN_CORR_BLK+=temp;
5817 temp = RxMessage[4] - mib_pread.ATUR_CHAN_UNCORR_BLK_INTL;
5818 if(temp>=0){
5819 current_intvl->AturChanPerfUncorrBlk+=temp;
5820 ATUR_CHAN_UNCORR_BLK+=temp;
5838 temp = RxMessage[4] - mib_pread.ATUR_CHAN_UNCORR_BLK_FAST;
5839 if(temp>=0){
5840 current_intvl->AturChanPerfUncorrBlk+=temp;
5841 ATUR_CHAN_UNCORR_BLK+=temp;
5862 temp = RxMessage[4] - mib_pread.ATUC_PERF_STAT_FASTR;
5863 if(temp>=0){
5864 current_intvl->AtucPerfStatFastR+=temp;
5865 ATUC_PERF_STAT_FASTR+=temp;
5881 temp = RxMessage[4] - mib_pread.ATUC_PERF_STAT_FAILED_FASTR;
5882 if(temp>=0){
5883 current_intvl->AtucPerfStatFailedFastR+=temp;
5884 ATUC_PERF_STAT_FAILED_FASTR+=temp;
5900 temp = RxMessage[4] - mib_pread.ATUC_PERF_STAT_SESL;
5901 if(temp>=0){
5902 current_intvl->AtucPerfStatSesL+=temp;
5903 ATUC_PERF_STAT_SESL+=temp;
5919 temp = RxMessage[4] - mib_pread.ATUC_PERF_STAT_UASL;
5920 if(temp>=0){
5921 current_intvl->AtucPerfStatUasL+=temp;
5922 ATUC_PERF_STAT_UASL+=temp;
5938 temp = RxMessage[4] - mib_pread.ATUR_PERF_STAT_SESL;
5939 if(temp>=0){
5940 current_intvl->AtucPerfStatUasL+=temp;
5941 ATUC_PERF_STAT_UASL+=temp;
6477 meiDebugRead_16(pcm_start_addr+i*16+12, &temp, 1);
6479 meiDMARead_16(pcm_start_addr+i*16+12, &temp, 1);
6481 temp = (temp &0xffff) + (((u32)(pcm_data[i].point))<<16);
6483 meiDebugWrite_16(pcm_start_addr+i*16+12,&temp, 1);//update wrindex
6485 meiDMAWrite_16(pcm_start_addr+i*16+12,&temp, 1);//update wrindex
6529 temp=0;
6532 temp++;
6537 if(temp!=0)
6538 printk("\n\n Channel pair %d not match: err32 %d\n\n", i, temp);
6545 meiDebugRead_16(pcm_start_addr+i*16+12, &temp, 1);
6547 meiDMARead_16(pcm_start_addr+i*16+12, &temp, 1);
6549 printk("\n\nRx channel %d: Overflow Bytes %d", i, (temp&0xffff));
6553 meiDebugRead_16(pcm_start_addr+i*16, &temp, 1);
6555 meiDMARead_16(pcm_start_addr+i*16, &temp, 1);
6557 printk("\n\nElectra Err: %d",(temp&0xffff));
6725 u32 temp;
6767 meiLongwordRead(MEI_TO_ARC_INT, &temp);
6768 if((temp & MEI_TO_ARC_CS_DONE) ==0){
7314 u32 temp,temp2;
7387 temp = RxMessage[4]-mib_pread.ATUC_PERF_ESS;
7388 if(temp>=0){
7389 current_intvl->AtucPerfEs+=temp;
7390 ATUC_PERF_ESS+=temp;
7435 temp = RxMessage[4]-mib_pread.ATUR_PERF_ESS;
7436 if(temp>=0){
7437 current_intvl->AturPerfEs+=temp;
7438 ATUR_PERF_ESS+=temp;
7457 temp = RxMessage[4];
7470 if((temp + (temp2<<16) - mib_pread.ATUR_CHAN_RECV_BLK)>=0){
7471 current_intvl->AturChanPerfRxBlk+=temp + (temp2<<16) - mib_pread.ATUR_CHAN_RECV_BLK;
7472 ATUR_CHAN_RECV_BLK+=temp + (temp2<<16) - mib_pread.ATUR_CHAN_RECV_BLK;
7473 mib_pread.ATUR_CHAN_RECV_BLK = temp + (temp2<<16);
7476 current_intvl->AturChanPerfRxBlk+=0xffffffff - mib_pread.ATUR_CHAN_RECV_BLK +(temp + (temp2<<16));
7477 ATUR_CHAN_RECV_BLK+=0xffffffff - mib_pread.ATUR_CHAN_RECV_BLK +(temp + (temp2<<16));
7478 mib_pread.ATUR_CHAN_RECV_BLK = temp + (temp2<<16);
7512 temp = RxMessage[4] - mib_pread.ATUR_CHAN_CORR_BLK_INTL;
7513 if(temp>=0){
7514 current_intvl->AturChanPerfCorrBlk+=temp;
7515 ATUR_CHAN_CORR_BLK+=temp;
7535 temp = RxMessage[4] - mib_pread.ATUR_CHAN_CORR_BLK_FAST;
7536 if(temp>=0){
7537 current_intvl->AturChanPerfCorrBlk+=temp;
7538 ATUR_CHAN_CORR_BLK+=temp;
7559 temp = RxMessage[4] - mib_pread.ATUR_CHAN_UNCORR_BLK_INTL;
7560 if(temp>=0){
7561 current_intvl->AturChanPerfUncorrBlk+=temp;
7562 ATUR_CHAN_UNCORR_BLK+=temp;
7582 temp = RxMessage[4] - mib_pread.ATUR_CHAN_UNCORR_BLK_FAST;
7583 if(temp>=0){
7584 current_intvl->AturChanPerfUncorrBlk+=temp;
7585 ATUR_CHAN_UNCORR_BLK+=temp;
7608 temp = RxMessage[4] - mib_pread.ATUC_PERF_STAT_FASTR;
7609 if(temp>=0){
7610 current_intvl->AtucPerfStatFastR+=temp;
7611 ATUC_PERF_STAT_FASTR+=temp;
7629 temp = RxMessage[4] - mib_pread.ATUC_PERF_STAT_FAILED_FASTR;
7630 if(temp>=0){
7631 current_intvl->AtucPerfStatFailedFastR+=temp;
7632 ATUC_PERF_STAT_FAILED_FASTR+=temp;
7650 temp = RxMessage[4] - mib_pread.ATUC_PERF_STAT_SESL;
7651 if(temp>=0){
7652 current_intvl->AtucPerfStatSesL+=temp;
7653 ATUC_PERF_STAT_SESL+=temp;
7671 temp = RxMessage[4] - mib_pread.ATUC_PERF_STAT_UASL;
7672 if(temp>=0){
7673 current_intvl->AtucPerfStatUasL+=temp;
7674 ATUC_PERF_STAT_UASL+=temp;
7692 temp = RxMessage[4] - mib_pread.ATUR_PERF_STAT_SESL;
7693 if(temp>=0){
7694 current_intvl->AtucPerfStatUasL+=temp;
7695 ATUC_PERF_STAT_UASL+=temp;