Lines Matching refs:enable
45 shiva_port_igmps_status_set(a_uint32_t dev_id, fal_port_t port_id, a_bool_t enable);
49 shiva_port_igmps_status_get(a_uint32_t dev_id, fal_port_t port_id, a_bool_t *enable);
61 shiva_port_igmp_mld_join_set(a_uint32_t dev_id, fal_port_t port_id, a_bool_t enable);
65 shiva_port_igmp_mld_join_get(a_uint32_t dev_id, fal_port_t port_id, a_bool_t * enable);
69 shiva_port_igmp_mld_leave_set(a_uint32_t dev_id, fal_port_t port_id, a_bool_t enable);
73 shiva_port_igmp_mld_leave_get(a_uint32_t dev_id, fal_port_t port_id, a_bool_t * enable);
85 shiva_igmp_mld_entry_creat_set(a_uint32_t dev_id, a_bool_t enable);
89 shiva_igmp_mld_entry_creat_get(a_uint32_t dev_id, a_bool_t * enable);
93 shiva_igmp_mld_entry_static_set(a_uint32_t dev_id, a_bool_t enable);
97 shiva_igmp_mld_entry_static_get(a_uint32_t dev_id, a_bool_t * enable);
101 shiva_igmp_mld_entry_leaky_set(a_uint32_t dev_id, a_bool_t enable);
105 shiva_igmp_mld_entry_leaky_get(a_uint32_t dev_id, a_bool_t * enable);
109 shiva_igmp_mld_entry_v3_set(a_uint32_t dev_id, a_bool_t enable);
113 shiva_igmp_mld_entry_v3_get(a_uint32_t dev_id, a_bool_t * enable);
117 shiva_igmp_mld_entry_queue_set(a_uint32_t dev_id, a_bool_t enable, a_uint32_t queue);
121 shiva_igmp_mld_entry_queue_get(a_uint32_t dev_id, a_bool_t * enable, a_uint32_t * queue);