Lines Matching refs:readl
227 ctl_reg0 = readl(UBI32_COREn_CLK_CTL(0));
228 ctl_reg1 = readl(UBI32_COREn_CLK_CTL(1));
241 ctl_reg0 = readl(UBI32_COREn_CLK_CTL(0));
242 ctl_reg1 = readl(UBI32_COREn_CLK_CTL(1));
264 nss_trace("NSSFB0_CLK_SRC_CTL : %x\n", readl(NSSFB0_CLK_SRC_CTL));
265 nss_trace("NSSFB1_CLK_SRC_CTL : %x\n", readl(NSSFB1_CLK_SRC_CTL));
266 nss_trace("NSSFB0_CLK_SRC0_NS : %x\n", readl(NSSFB0_CLK_SRC0_NS));
267 nss_trace("NSSFB0_CLK_SRC1_NS : %x\n", readl(NSSFB0_CLK_SRC1_NS));
268 nss_trace("NSSFB1_CLK_SRC0_NS : %x\n", readl(NSSFB1_CLK_SRC0_NS));
269 nss_trace("NSSFB1_CLK_SRC1_NS : %x\n", readl(NSSFB1_CLK_SRC1_NS));
271 nss_trace("PLL_ENA_NSS : %x\n", readl(PLL_ENA_NSS));
272 nss_trace("PLL18_L_VAL : %x\n", readl(PLL18_L_VAL));
273 nss_trace("PLL18_M_VAL : %x\n", readl(PLL18_M_VAL));
274 nss_trace("PLL18_N_VAL : %x\n", readl(PLL18_N_VAL));
275 nss_trace("PLL18_CONFIG : %x\n", readl(PLL18_CONFIG));
276 nss_trace("PLL18_TEST_CTL: %x\n", readl(PLL18_TEST_CTL));
278 nss_trace("UBI32_COREn_CLK_SRC0_CTL Core 0: %x\n", readl(UBI32_COREn_CLK_SRC_CTL(0)));
279 nss_trace("UBI32_COREn_CLK_SRC0_CTL Core 1: %x\n", readl(UBI32_COREn_CLK_SRC_CTL(1)));
280 nss_trace("UBI32_COREn_CLK_SRC0_NS Core 0: %x\n", readl(UBI32_COREn_CLK_SRC0_NS(0)));
281 nss_trace("UBI32_COREn_CLK_SRC0_NS Core 1: %x\n", readl(UBI32_COREn_CLK_SRC0_NS(1)));
282 nss_trace("UBI32_COREn_CLK_SRC0_MD Core 0: %x\n", readl(UBI32_COREn_CLK_SRC0_MD(0)));
283 nss_trace("UBI32_COREn_CLK_SRC0_MD Core 1: %x\n", readl(UBI32_COREn_CLK_SRC0_MD(1)));
306 nss_trace("NSSFB0_CLK_SRC_CTL : %x\n", readl(NSSFB0_CLK_SRC_CTL));
307 nss_trace("NSSFB1_CLK_SRC_CTL : %x\n", readl(NSSFB1_CLK_SRC_CTL));
308 nss_trace("NSSFB0_CLK_SRC0_NS : %x\n", readl(NSSFB0_CLK_SRC0_NS));
309 nss_trace("NSSFB0_CLK_SRC1_NS : %x\n", readl(NSSFB0_CLK_SRC1_NS));
310 nss_trace("NSSFB1_CLK_SRC0_NS : %x\n", readl(NSSFB1_CLK_SRC0_NS));
311 nss_trace("NSSFB1_CLK_SRC1_NS : %x\n", readl(NSSFB1_CLK_SRC1_NS));
313 nss_trace("PLL_ENA_NSS : %x\n", readl(PLL_ENA_NSS));
314 nss_trace("PLL18_L_VAL : %x\n", readl(PLL18_L_VAL));
315 nss_trace("PLL18_M_VAL : %x\n", readl(PLL18_M_VAL));
316 nss_trace("PLL18_N_VAL : %x\n", readl(PLL18_N_VAL));
317 nss_trace("PLL18_CONFIG : %x\n", readl(PLL18_CONFIG));
318 nss_trace("PLL18_TEST_CTL: %x\n", readl(PLL18_TEST_CTL));
320 nss_trace("UBI32_COREn_CLK_SRC0_CTL Core 0: %x\n", readl(UBI32_COREn_CLK_SRC_CTL(0)));
321 nss_trace("UBI32_COREn_CLK_SRC0_CTL Core 1: %x\n", readl(UBI32_COREn_CLK_SRC_CTL(1)));
322 nss_trace("UBI32_COREn_CLK_SRC0_NS Core 0: %x\n", readl(UBI32_COREn_CLK_SRC0_NS(0)));
323 nss_trace("UBI32_COREn_CLK_SRC0_NS Core 1: %x\n", readl(UBI32_COREn_CLK_SRC0_NS(1)));
324 nss_trace("UBI32_COREn_CLK_SRC0_MD Core 0: %x\n", readl(UBI32_COREn_CLK_SRC0_MD(0)));
325 nss_trace("UBI32_COREn_CLK_SRC0_MD Core 1: %x\n", readl(UBI32_COREn_CLK_SRC0_MD(1)));
329 md_reg0 = readl(UBI32_COREn_CLK_SRC0_MD(0));
330 md_reg1 = readl(UBI32_COREn_CLK_SRC0_MD(1));
331 ns_reg0 = readl(UBI32_COREn_CLK_SRC0_NS(0));
332 ns_reg1 = readl(UBI32_COREn_CLK_SRC0_NS(1));
409 nss_trace("UBI32_COREn_CLK_SRC0_CTL Core 0: %x\n", readl(UBI32_COREn_CLK_SRC_CTL(0)));
410 nss_trace("UBI32_COREn_CLK_SRC0_CTL Core 1: %x\n", readl(UBI32_COREn_CLK_SRC_CTL(1)));
411 nss_trace("UBI32_COREn_CLK_SRC0_NS Core 0: %x\n", readl(UBI32_COREn_CLK_SRC0_NS(0)));
412 nss_trace("UBI32_COREn_CLK_SRC0_NS Core 1: %x\n", readl(UBI32_COREn_CLK_SRC0_NS(1)));
413 nss_trace("UBI32_COREn_CLK_SRC0_MD Core 0: %x\n", readl(UBI32_COREn_CLK_SRC0_MD(0)));
414 nss_trace("UBI32_COREn_CLK_SRC0_MD Core 1: %x\n", readl(UBI32_COREn_CLK_SRC0_MD(1)));
482 value = readl(PLL_LOCK_DET_STATUS);
632 writel((readl(PLL_ENA_NSS) | 0x1), PLL_ENA_NSS);
634 value = readl(PLL_LOCK_DET_STATUS);